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Is there any way to have memory that is byte-addressable rather than word-addressable? I'm trying to build a very simple RISC-V processor, which calls for Byte-addressable memory and I can't figure out a way to do it. Ideally I'd want both ROM and RAM. I suppose it can be built up from individual register or even flip-flops, but aside from the complexity of doing this for a large memory space, I wouldn't be able to load a hex file into such memory... |
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Not sure exactly what you want, but what I would start looking into is simply taking four of 8-bit RAMs, connect the address lines in parallel on all of them (except maybe A0 and A1) depending on how I would like to address the memories in non-32 bit mode. Then I would put some multiplexers at the data outputs of the RAMs. In normal mode the four RAMs would connect their data to a separate part of the data-bus (0-7, 7-15, 16-23, 24-31). Or let one (any) of them be muxxed into D0-D7 (and the others be disconnected). Of courser there will be some issues with the chip selects and the A0 and A1 depending on which mode you are access ing the memory in in any particular moment. But a bit of logic and decoders connected to your MOP control lines would solve that quire easily as soon as you have defined at a low level exactly what to do in each mode. |
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You can find a RAM32Bit in Library->Rams. |
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You can find a RAM32Bit in Library->Rams.
It is a 32-bit RAM with a byte address and an AM flag that selects the word, half-word or byte mode. It also has a Sign flag to enable sign extension. Remember to set the size in the generic section of the component.