Optimization: Cached RIP reads

Signed-off-by: Alexandro Sanchez Bach <[email protected]>

Author: AlexAltea

core/cpu.c

@@ -375,8 +375,6 @@ int cpu_vmx_execute(struct vcpu_t *vcpu, struct hax_tunnel *htun)
          * reason is, we have no schedule hook to get notified of preemption
          * This should be changed later after get better idea
          */
-        vcpu->state->_rip = vmread(vcpu, GUEST_RIP);
-
         hax_handle_idt_vectoring(vcpu);
 
         vmx(vcpu, exit_qualification).raw = vmread(
@@ -599,7 +597,7 @@ static void cpu_vmentry_failed(struct vcpu_t *vcpu, vmx_result_t result)
     uint64_t error, reason;
 
     hax_error("VM entry failed: RIP=%08lx\n",
-              (mword)vmread(vcpu, GUEST_RIP));
+              (mword)vmcs_read(vcpu, GUEST_RIP));
 
     //dump_vmcs();
 

core/include/vcpu.h

@@ -256,6 +256,7 @@ void hax_panic_vcpu(struct vcpu_t *v, char *fmt, ...);
 
 // Extension-specific operations
 
+mword vcpu_get_rip(struct vcpu_t *vcpu);
 uint16_t vcpu_get_seg_selector(struct vcpu_t *vcpu, int seg);
 mword vcpu_get_seg_base(struct vcpu_t *vcpu, int seg);
 uint32_t vcpu_get_seg_limit(struct vcpu_t *vcpu, int seg);

core/include/vmx.h

@@ -338,7 +338,7 @@ typedef enum component_index_t component_index_t;
     COMP(0, 0, W_UL, HOST_IDTR_BASE)                         \
     COMP(0, 0, W_UL, HOST_SYSENTER_ESP)                      \
     COMP(0, 0, W_UL, HOST_SYSENTER_EIP)                      \
-    COMP(0, 0, W_UL, GUEST_RIP)                              \
+    COMP(1, 0, W_UL, GUEST_RIP)                              \
     COMP(0, 0, W_UL, GUEST_RFLAGS)                           \
     COMP(0, 0, W_UL, GUEST_RSP)                              \
     COMP(0, 0, W_UL, GUEST_CR0)                              \

core/vcpu.c

@@ -1751,6 +1751,7 @@ static void advance_rip(struct vcpu_t *vcpu)
         vcpu->interruptibility_dirty = 1;
     }
 
+    state->_rip = vcpu_get_rip(vcpu);
     state->_rip += vmcs_read(vcpu, VM_EXIT_INFO_INSTRUCTION_LENGTH);
     vcpu->rip_dirty = 1;
 }
@@ -1966,8 +1967,8 @@ static void vmwrite_cr(struct vcpu_t *vcpu)
         cr4_mask |= CR4_PAE;
         eptp = vm_get_eptp(vcpu->vm);
         hax_assert(eptp != INVALID_EPTP);
-        // hax_debug("Guest eip:%llx, EPT mode, eptp:%llx\n", vcpu->state->_rip,
-        //           eptp);
+        // hax_debug("Guest eip:%llx, EPT mode, eptp:%llx\n",
+        //           vcpu_get_rip(vcpu), eptp);
         vmwrite(vcpu, GUEST_CR3, state->_cr3);
         scpu_ctls |= ENABLE_EPT;
         // Set PDPTEs for vCPU if it's in or about to enter PAE paging mode
@@ -2096,7 +2097,7 @@ static int vcpu_emulate_insn(struct vcpu_t *vcpu)
     em_context_t *em_ctxt = &vcpu->emulate_ctxt;
     uint8_t instr[INSTR_MAX_LEN] = {0};
     uint32_t exit_instr_length = vmcs_read(vcpu, VM_EXIT_INFO_INSTRUCTION_LENGTH);
-    uint64_t rip = vcpu->state->_rip;
+    uint64_t rip = vcpu_get_rip(vcpu);
     segment_desc_t cs;
     uint64_t va;
 
@@ -2347,14 +2348,14 @@ static int exit_exc_nmi(struct vcpu_t *vcpu, struct hax_tunnel *htun)
         }
         case VECTOR_DB: {
             htun->_exit_status = HAX_EXIT_DEBUG;
-            htun->debug.rip = vcpu->state->_rip;
+            htun->debug.rip = vcpu_get_rip(vcpu);
             htun->debug.dr6 = vmx(vcpu, exit_qualification).raw;
             htun->debug.dr7 = vmread(vcpu, GUEST_DR7);
             return HAX_EXIT;
         }
         case VECTOR_BP: {
             htun->_exit_status = HAX_EXIT_DEBUG;
-            htun->debug.rip = vcpu->state->_rip;
+            htun->debug.rip = vcpu_get_rip(vcpu);
             htun->debug.dr6 = 0;
             htun->debug.dr7 = 0;
             return HAX_EXIT;
@@ -2736,7 +2737,7 @@ static int exit_invlpg(struct vcpu_t *vcpu, struct hax_tunnel *htun)
 
 static int exit_rdtsc(struct vcpu_t *vcpu, struct hax_tunnel *htun)
 {
-    hax_debug("rdtsc exiting: rip: %llx\n", vcpu->state->_rip);
+    hax_debug("rdtsc exiting: rip: %lx\n", vcpu_get_rip(vcpu));
     return HAX_RESUME;
 }
 

core/vmx.c

@@ -327,6 +327,11 @@ void vcpu_vmcs_flush_cache_w(struct vcpu_t *vcpu)
     vcpu->vmx.vmcs_cache_w.dirty = 0;
 }
 
+mword vcpu_get_rip(struct vcpu_t *vcpu)
+{
+    return vmcs_read(vcpu, GUEST_RIP);
+}
+
 uint16_t vcpu_get_seg_selector(struct vcpu_t *vcpu, int seg)
 {
     uint16_t value;