llvm-spirv: Assertion `false && "Id is not in map"

[dvrogozh]

Describe the bug

Building Pytorch per pytorch/pytorch@ffee571 with intel/llvm compiler fails with the following assert:

llvm/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVModule.cpp

Line 995 in b09acde

assert(false && "Id is not in map");

This seems a regression as I was able to build successfully before. Good revision needs to be found though as some time passed since I built with intel/llvm main branch as recently I focused on 7.0 release.

To reproduce

Input file can be found here:

• https://github.com/dvrogozh/llvm/blob/for-22308/assets/torch_xpu_ops_gen_NestedTensorBinaryOpsKernels.cpp-spir64_gen_34.bc

$ "./build/install/bin/llvm-spirv" "-o" "out.spv" "-spirv-max-version=1.5" "-spirv-debug-info-version=nonsemantic-shader-200" "-spirv-allow-unknown-intrinsics=llvm.genx." "-spirv-ext=-all,+SPV_EXT_shader_atomic_float_add,+SPV_EXT_shader_atomic_float_min_max,+SPV_KHR_no_integer_wrap_decoration,+SPV_KHR_float_controls,+SPV_KHR_expect_assume,+SPV_KHR_linkonce_odr,+SPV_INTEL_subgroups,+SPV_INTEL_media_block_io,+SPV_INTEL_device_side_avc_motion_estimation,+SPV_INTEL_fpga_loop_controls,+SPV_INTEL_unstructured_loop_controls,+SPV_INTEL_fpga_reg,+SPV_INTEL_blocking_pipes,+SPV_INTEL_function_pointers,+SPV_INTEL_kernel_attributes,+SPV_INTEL_io_pipes,+SPV_INTEL_inline_assembly,+SPV_INTEL_arbitrary_precision_integers,+SPV_INTEL_float_controls2,+SPV_INTEL_vector_compute,+SPV_INTEL_arbitrary_precision_fixed_point,+SPV_INTEL_arbitrary_precision_floating_point,+SPV_INTEL_variable_length_array,+SPV_INTEL_fp_fast_math_mode,+SPV_INTEL_long_composites,+SPV_INTEL_arithmetic_fence,+SPV_INTEL_global_variable_decorations,+SPV_INTEL_cache_controls,+SPV_INTEL_fpga_buffer_location,+SPV_INTEL_fpga_argument_interfaces,+SPV_INTEL_fpga_invocation_pipelining_attributes,+SPV_INTEL_fpga_latency_control,+SPV_KHR_shader_clock,+SPV_INTEL_bindless_images,+SPV_INTEL_task_sequence,+SPV_INTEL_bfloat16_conversion,+SPV_INTEL_joint_matrix,+SPV_INTEL_hw_thread_queries,+SPV_KHR_uniform_group_instructions,+SPV_INTEL_masked_gather_scatter,+SPV_INTEL_tensor_float32_conversion,+SPV_INTEL_optnone,+SPV_KHR_non_semantic_info,+SPV_KHR_cooperative_matrix,+SPV_EXT_shader_atomic_float16_add,+SPV_INTEL_fp_max_error,+SPV_INTEL_memory_access_aliasing" ./assets/torch_xpu_ops_gen_NestedTensorBinaryOpsKernels.cpp-spir64_gen_34.bc
llvm-spirv: /home/dvrogozh/git/intel-llvm/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVModule.cpp:995: virtual SPIRV::SPIRVEntry* SPIRV::SPIRVModuleImpl::getEntry(SPIRV::SPIRVId) const: Assertion `false && "Id is not in map"' failed.
PLEASE submit a bug report to https://github.com/intel/llvm/issues and include the crash backtrace and instructions to reproduce the bug.
Stack dump:
0.      Program arguments: ./build/install/bin/llvm-spirv -o out.spv -spirv-max-version=1.5 -spirv-debug-info-version=nonsemantic-shader-200 -spirv-allow-unknown-intrinsics=llvm.genx. -spirv-ext=-all,+SPV_EXT_shader_atomic_float_add,+SPV_EXT_shader_atomic_float_min_max,+SPV_KHR_no_integer_wrap_decoration,+SPV_KHR_float_controls,+SPV_KHR_expect_assume,+SPV_KHR_linkonce_odr,+SPV_INTEL_subgroups,+SPV_INTEL_media_block_io,+SPV_INTEL_device_side_avc_motion_estimation,+SPV_INTEL_fpga_loop_controls,+SPV_INTEL_unstructured_loop_controls,+SPV_INTEL_fpga_reg,+SPV_INTEL_blocking_pipes,+SPV_INTEL_function_pointers,+SPV_INTEL_kernel_attributes,+SPV_INTEL_io_pipes,+SPV_INTEL_inline_assembly,+SPV_INTEL_arbitrary_precision_integers,+SPV_INTEL_float_controls2,+SPV_INTEL_vector_compute,+SPV_INTEL_arbitrary_precision_fixed_point,+SPV_INTEL_arbitrary_precision_floating_point,+SPV_INTEL_variable_length_array,+SPV_INTEL_fp_fast_math_mode,+SPV_INTEL_long_composites,+SPV_INTEL_arithmetic_fence,+SPV_INTEL_global_variable_decorations,+SPV_INTEL_cache_controls,+SPV_INTEL_fpga_buffer_location,+SPV_INTEL_fpga_argument_interfaces,+SPV_INTEL_fpga_invocation_pipelining_attributes,+SPV_INTEL_fpga_latency_control,+SPV_KHR_shader_clock,+SPV_INTEL_bindless_images,+SPV_INTEL_task_sequence,+SPV_INTEL_bfloat16_conversion,+SPV_INTEL_joint_matrix,+SPV_INTEL_hw_thread_queries,+SPV_KHR_uniform_group_instructions,+SPV_INTEL_masked_gather_scatter,+SPV_INTEL_tensor_float32_conversion,+SPV_INTEL_optnone,+SPV_KHR_non_semantic_info,+SPV_KHR_cooperative_matrix,+SPV_EXT_shader_atomic_float16_add,+SPV_INTEL_fp_max_error,+SPV_INTEL_memory_access_aliasing /home/dvrogozh/bugs/llvm-assert/torch_xpu_ops_gen_NestedTensorBinaryOpsKernels.cpp-spir64_gen_34.bc
 #0 0x00006204df8fd652 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (./build/install/bin/llvm-spirv+0xa3d652)
 #1 0x00006204df8fa4ef llvm::sys::RunSignalHandlers() (./build/install/bin/llvm-spirv+0xa3a4ef)
 #2 0x00006204df8fa63c SignalHandler(int, siginfo_t*, void*) Signals.cpp:0:0
 #3 0x0000742fd2a45330 (/lib/x86_64-linux-gnu/libc.so.6+0x45330)
 #4 0x0000742fd2a9eb2c __pthread_kill_implementation ./nptl/pthread_kill.c:44:76
 #5 0x0000742fd2a9eb2c __pthread_kill_internal ./nptl/pthread_kill.c:78:10
 #6 0x0000742fd2a9eb2c pthread_kill ./nptl/pthread_kill.c:89:10
 #7 0x0000742fd2a4527e raise ./signal/../sysdeps/posix/raise.c:27:6
 #8 0x0000742fd2a288ff abort ./stdlib/abort.c:81:7
 #9 0x0000742fd2a2881b _nl_load_domain ./intl/loadmsgcat.c:1177:9
#10 0x0000742fd2a3b517 (/lib/x86_64-linux-gnu/libc.so.6+0x3b517)
#11 0x00006204df2e5fad SPIRV::SPIRVModuleImpl::getEntry(unsigned int) const (./build/install/bin/llvm-spirv+0x425fad)
#12 0x00006204df2fcf75 SPIRV::operator<<(std::ostream&, SPIRV::SPIRVModule&) (./build/install/bin/llvm-spirv+0x43cf75)
#13 0x00006204df20d2a8 (anonymous namespace)::runSpirvWriterPasses(llvm::Module*, std::ostream*, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>&, SPIRV::TranslatorOpts const&) SPIRVWriter.cpp:0:0
#14 0x00006204deffcaa8 main (./build/install/bin/llvm-spirv+0x13caa8)
#15 0x0000742fd2a2a1ca __libc_start_call_main ./csu/../sysdeps/nptl/libc_start_call_main.h:74:3
#16 0x0000742fd2a2a28b call_init ./csu/../csu/libc-start.c:128:20
#17 0x0000742fd2a2a28b __libc_start_main ./csu/../csu/libc-start.c:347:5
#18 0x00006204df0f0a85 _start (./build/install/bin/llvm-spirv+0x230a85)
Aborted (core dumped)

Environment

On:

• efcbf08 (latest main on 6/12/2026)
• Ubuntu 24.04
• PVC w/ LTS2 (2523) driver stack

Additional context

1. First encountered issue with 7.0 release branch which looks as segfault in the compiler
2. Compiler log on 7.0 is less descriptive and issue signature looks different (maybe due to enabled/disabled asserts)
3. Looking into issue in main I found more descriptive log with specific firing assert
4. Unfortunately it's more difficult to me to return to last good revision on main as I mostly switched to 7.0 by now

CC: @sarnex

[sarnex]

@intel/dpcpp-spirv-reviewers Can someone from the team please prioritize this? Thanks

[dvrogozh]

The nightly-2026-05-20 seems to work without issue. I will try to bisect.

[dvrogozh]

Ok, here are bisect results:

git bisect start '--first-parent'
# status: waiting for both good and bad commits
# good: [e160638be5d20dc9369a17b817a2485d5a3fbcb0] [UR] Revert #21930 (#22065)
git bisect good e160638be5d20dc9369a17b817a2485d5a3fbcb0
# status: waiting for bad commit, 1 good commit known
# bad: [efcbf080f4f1a5403dffc95afe4976fce9b7e69c] [SYCL][Doc] Specify negative conversion to E8M0 (#22303)
git bisect bad efcbf080f4f1a5403dffc95afe4976fce9b7e69c
# good: [cd9cb002b72d31fc81c7f61361d6b5718a9089b5] [SPIR-V] Reland "Translate icmp eq and icmp ne to PtrEqual and PtrNotEqual" (#22117)
git bisect good cd9cb002b72d31fc81c7f61361d6b5718a9089b5
# good: [21b1813f266e9b6a52809b1b0996b69bd37c7dc5] [SYCL] Replace wait_for recursive helper with fold expression (#22238)
git bisect good 21b1813f266e9b6a52809b1b0996b69bd37c7dc5
# bad: [202a148491065e1fcf2e1d750651e3525dbcb578] [SYCL][SYCLBIN] Fix kernel lookup after link of SYCLBIN + RTC bundles (#22218)
git bisect bad 202a148491065e1fcf2e1d750651e3525dbcb578
# bad: [3488ea3d7412c616bef92e17bb88deaa65842c06] [UR] Implement IPC physical_mem API in UR (#22115)
git bisect bad 3488ea3d7412c616bef92e17bb88deaa65842c06
# bad: [84a77fda598fed7921c06bc6c09be9cf08cb7d22] [SYCL] Re-enable read_write_1D_subregion e2e test (#22251)
git bisect bad 84a77fda598fed7921c06bc6c09be9cf08cb7d22
# bad: [ff6857ef6725103e07b18c027d5c39f6ddd79950] Disable llvm-spirv test llvm-intrinsics/memmove.ll (#22249)
git bisect bad ff6857ef6725103e07b18c027d5c39f6ddd79950
# bad: [8bcf1108f7edb2c2ff17535844ca3a9b1d2909c2] LLVM and SPIRV-LLVM-Translator pulldown (WW23 2026)
git bisect bad 8bcf1108f7edb2c2ff17535844ca3a9b1d2909c2
# first bad commit: [8bcf1108f7edb2c2ff17535844ca3a9b1d2909c2] LLVM and SPIRV-LLVM-Translator pulldown (WW23 2026)

Which point to the massive 8bcf110 update:

$ git show 8bcf1108f7edb2c2ff17535844ca3a9b1d2909c2
commit 8bcf1108f7edb2c2ff17535844ca3a9b1d2909c2 (HEAD)
Merge: 21b1813f266e 5a3fd2fb7849
Author: Nick Sarnie <nick.sarnie@intel.com>
Date:   Mon Jun 8 08:05:05 2026 -0700

    LLVM and SPIRV-LLVM-Translator pulldown (WW23 2026)

[sarnex]

Yeah that's not surprising, so something from upstream (or something we added in the pulldown merge itself) broke it

[KornevNikita]

@dvrogozh so 7.0 is also affected?

[dvrogozh]

@dvrogozh so 7.0 is also affected?

@KornevNikita , the issue on 7.0 might be a different issue - signature differs. I will conduct more experiments on 7.0 today and let you know.

[dvrogozh]

I wonder if the issue is with the llvm-spirv or with the step before that? The reason why I am asking that is the similarities and differences of the issues on main (sycl) branch and 7.0 release branch (6a4589f). Below are details.

1. In both cases issue appears on the following long cmdline (instead of ${HERE_GOES_LONG_LIST_OF_VARIOUS_CPP_O_FILES} there are few dozens of input files):

dpclang++ -fPIC -fsycl -fsycl-max-parallel-link-jobs=96 --offload-compress \
  -fsycl-targets=spir64_gen,spir64 -fsycl-link torch_xpu_ops_gen_NestedTensorBinaryOpsKernels.cpp.o \
  ${HERE_GOES_LONG_LIST_OF_VARIOUS_CPP_O_FILES} \
  -Xs -device\ pvc\ -options\ -cl-poison-unsupported-fp64-kernels\ -options\ -cl-intel-enable-auto-large-GRF-mode\ -options\ -cl-fp32-correctly-rounded-divide-sqrt\ -options\ -cl-intel-greater-than-4GB-buffer-required \
  -o out.o

2. Interesting part is that if I leave only 1 input file (NestedTensorBinaryOpsKernels.cpp.o), then I do not see any issue at all. And another observation is number of intermediate NestedTensorBinaryOpsKernels-.spv files generated. With 1 input file - I get 8 .spv files. With many input files - I get few hundreds.
3. On main (sycl) branch assert is being fired with llvm-spirv command - see issue description above
4. On 7.0 release branch ocloc fails with (input file: https://github.com/dvrogozh/llvm/blob/for-rel-7.0-ocloc-segfault/assets/torch_xpu_ops_gen_NestedTensorBinaryOpsKernels-383f7d-279fee.spv):

/usr/bin/ocloc -output a.out -file torch_xpu_ops_gen_NestedTensorBinaryOpsKernels-383f7d-279fee.spv \
  -output_no_suffix -spirv_input -device_options pvc -ze-intel-enable-auto-large-GRF-mode \
  -device pvc -options "-cl-poison-unsupported-fp64-kernels" -options "-cl-intel-enable-auto-large-GRF-mode" \
  -options "-cl-fp32-correctly-rounded-divide-sqrt" -options "-cl-intel-greater-than-4GB-buffer-required"
Compilation from IR - skipping loading of FCL
IGC: Internal Compiler Error: Segmentation violation
Build failed with error code: -11

Regarding issue with 7.0 release branch.

[dvrogozh]

Here is bisect for the https://github.com/intel/llvm/tree/sycl-rel-7_0 branch:

$ git bisect log
git bisect start
# status: waiting for both good and bad commits
# bad: [6a4589f07a592deb278a1c40c1b75ec478333f7d] Cherry-pick fixes for new spirv-val
git bisect bad 6a4589f07a592deb278a1c40c1b75ec478333f7d
# status: waiting for good commit(s), bad commit known
# good: [8c9609e0723795c0c82b7d2d097eed406e71156b] [SYCL][xpti] Make .pc file relocatable (#22255) (#22267)
git bisect good 8c9609e0723795c0c82b7d2d097eed406e71156b
# bad: [b02e91a3f4619049236b4c2cf2b2a3492f8afba6] Make DebugLinePriority test valid SPIR-V (#3672)
git bisect bad b02e91a3f4619049236b4c2cf2b2a3492f8afba6
# bad: [633e43406c4572028e82c95264d3eec153d1e57f] Disable spirv-val in llvm-spirv/test/DebugInfo/NonSemantic/Shader200/DebugLineOnlyOnce.ll
git bisect bad 633e43406c4572028e82c95264d3eec153d1e57f
# bad: [aa4b69d1f56bd1efd0c9c2e746fe1b9f3c5e0021] Revert llvm-spirv lifetime intrinsic customizations (#22253) (#22290)
git bisect bad aa4b69d1f56bd1efd0c9c2e746fe1b9f3c5e0021
# first bad commit: [aa4b69d1f56bd1efd0c9c2e746fe1b9f3c5e0021] Revert llvm-spirv lifetime intrinsic customizations (#22253) (#22290)

It points to aa4b69d:

commit aa4b69d1f56bd1efd0c9c2e746fe1b9f3c5e0021 (HEAD)
Author: Nikita Kornev <nikita.kornev@intel.com>
Date:   Thu Jun 11 12:51:24 2026 +0200

    Revert llvm-spirv lifetime intrinsic customizations (#22253) (#22290)

    Revert https://github.com/intel/llvm/pull/20287 and
    https://github.com/intel/llvm/pull/22249.

    The customization was made to handle older GPU Drivers not having the
    corresponding SPIRV Reader change, but all the drivers we use in CI
    (even Gen12 Windows) seems to work fine, so we don't need this anymore
    and it generates SPIR-V that causes `spirv-val` to complain, causing us
    to have to disable a test.

    CTS run:
    https://github.com/intel/llvm/actions/runs/27163769503/job/80193821812

    Closes: https://github.com/intel/llvm/issues/22248

    ---------

    Signed-off-by: Nick Sarnie <nick.sarnie@intel.com>
    Co-authored-by: Nick Sarnie <nick.sarnie@intel.com>

Note that the issue is with the build of pytorch, not runtime. Build fails on 2 distinct systems with 2 different drivers:

1. In CI for multiple platforms including pvc on the rolling drivers (latest public)
2. On my local system for only pvc platform on the LTS2 driver

CC: @KornevNikita , @sarnex