Shifting by constants produces complex names when using << versus >>>

[desmonddak]

Motivation

 final tShift = (t << 1).named('tShift');
 final tBarShift = (~t << 1).named('tBarShift');
 final zBarShift = (~z >>> 1).named('zBarShift');
 final gBarShift = (~g >>> 1).named('gBarShift');

produces

	assign tShift = t << _shiftAmount_const_8_h1;
	assign tBarShift = ~t << _shiftAmount_const_8_h1_0;
	assign zBarShift = ~z >> 1'h1;
	assign gBarShift = ~g >> 1'h1;

Desired solution

It would be nice to see

assign tShift = t << 1'h1;

Alternatives considered

No response

Additional details

No response

[desmonddak]

Again, this should be moved to ROHD

[mkorbel1]

This is because of linting issues in SystemVerilog
intel/rohd#423
intel/rohd#298

Have a better way to avoid the lints?