Skip to content

Commit 7ee162d

Browse files
committed
preparing version 9.0
1 parent 380f557 commit 7ee162d

File tree

4 files changed

+16
-15
lines changed

4 files changed

+16
-15
lines changed

compiler/res/version.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
9.0-dev
1+
9.0

docs/source/todo.rst

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,7 @@ Compiler:
2626
global initialization values are simply a list of LOAD instructions.
2727
Variables replaced include all subroutine parameters! So the only variables that remain as variables are arrays and strings.
2828
- ir: add more optimizations in IRPeepholeOptimizer
29+
- ir: the @split arrays are also split in _lsb/_msb arrays in the IR, and operations take multiple (byte) instructions that may lead to verbose and slow operation and machine code generation down the line.
2930
- ir: for expressions with array indexes that occur multiple times, can we avoid loading them into new virtualregs everytime and just reuse a single virtualreg as indexer? (simple form of common subexpression elimination)
3031
- PtAst/IR: more complex common subexpression eliminations
3132
- generate WASM to eventually run prog8 on a browser canvas? Use binaryen toolkit or my binaryen kotlin library?
@@ -35,7 +36,7 @@ Compiler:
3536
But all library code written in asm uses .proc already..... (textual search/replace when writing the actual asm?)
3637
Once new codegen is written that is based on the IR, this point is mostly moot anyway as that will have its own dead code removal on the IR level.
3738
- Zig-like try-based error handling where the V flag could indicate error condition? and/or BRK to jump into monitor on failure? (has to set BRK vector for that) But the V flag is also set on certain normal instructions
38-
- For c128 target; put floating point variables in bank 1 to make the FP routines work (is this even worth it? very few people will use fp)
39+
3940

4041
Libraries:
4142

intermediate/src/prog8/intermediate/IRFileWriter.kt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -126,7 +126,7 @@ class IRFileWriter(private val irProgram: IRProgram, outfileOverride: Path?) {
126126
private fun writeCodeChunk(chunk: IRCodeChunk) {
127127
xml.writeStartElement("CODE")
128128
chunk.label?.let { xml.writeAttribute("LABEL", chunk.label) }
129-
xml.writeAttribute("used-registers", chunk.usedRegisters().toString())
129+
// xml.writeAttribute("used-registers", chunk.usedRegisters().toString())
130130
xml.writeCharacters("\n")
131131
chunk.instructions.forEach { instr ->
132132
numInstr++

intermediate/src/prog8/intermediate/IRInstructions.kt

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -97,18 +97,18 @@ bgesr reg1, reg2, address - jump to location in program given by l
9797
ble reg1, value, address - jump to location in program given by location, if reg1 <= immediate value (unsigned)
9898
bles reg1, value, address - jump to location in program given by location, if reg1 <= immediate value (signed)
9999
( NOTE: there are no bltr/bler instructions because these are equivalent to bgtr/bger with the register operands swapped around.)
100-
sz reg1, reg2 - set reg1=1.b if reg2==0, otherwise set reg1=0.b
101-
snz reg1, reg2 - set reg1=1.b if reg2!=0, otherwise set reg1=0.b
102-
seq reg1, reg2 - set reg1=1.b if reg1 == reg2, otherwise set reg1=0.b
103-
sne reg1, reg2 - set reg1=1.b if reg1 != reg2, otherwise set reg1=0.b
104-
slt reg1, reg2 - set reg1=1.b if reg1 < reg2 (unsigned), otherwise set reg1=0.b
105-
slts reg1, reg2 - set reg1=1.b if reg1 < reg2 (signed), otherwise set reg1=0.b
106-
sle reg1, reg2 - set reg1=1.b if reg1 <= reg2 (unsigned), otherwise set reg1=0.b
107-
sles reg1, reg2 - set reg1=1.b if reg1 <= reg2 (signed), otherwise set reg1=0.b
108-
sgt reg1, reg2 - set reg1=1.b if reg1 > reg2 (unsigned), otherwise set reg1=0.b
109-
sgts reg1, reg2 - set reg1=1.b if reg1 > reg2 (signed), otherwise set reg1=0.b
110-
sge reg1, reg2 - set reg1=1.b if reg1 >= reg2 (unsigned), otherwise set reg1=0.b
111-
sges reg1, reg2 - set reg1=1.b if reg1 >= reg2 (signed), otherwise set reg1=0.b
100+
sz reg1, reg2 - set reg1=1.b if reg2==0, else 0.b
101+
snz reg1, reg2 - set reg1=1.b if reg2!=0, else 0.b
102+
seq reg1, reg2 - set reg1=1.b if reg1 == reg2, else 0.b
103+
sne reg1, reg2 - set reg1=1.b if reg1 != reg2, else 0.b
104+
slt reg1, reg2 - set reg1=1.b if reg1 < reg2 (unsigned), else 0.b
105+
slts reg1, reg2 - set reg1=1.b if reg1 < reg2 (signed), else 0.b
106+
sle reg1, reg2 - set reg1=1.b if reg1 <= reg2 (unsigned), else 0.b
107+
sles reg1, reg2 - set reg1=1.b if reg1 <= reg2 (signed), else 0.b
108+
sgt reg1, reg2 - set reg1=1.b if reg1 > reg2 (unsigned), else 0.b
109+
sgts reg1, reg2 - set reg1=1.b if reg1 > reg2 (signed), else 0.b
110+
sge reg1, reg2 - set reg1=1.b if reg1 >= reg2 (unsigned), else 0.b
111+
sges reg1, reg2 - set reg1=1.b if reg1 >= reg2 (signed), else 0.b
112112
113113
114114
ARITHMETIC

0 commit comments

Comments
 (0)