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Description
https://www.cs.cmu.edu/~15411/lectures/04-instsel.pdf
Tasks
- Design IR trees for generating abstract assembly
- SSA
After abstract assembly codegen is done, integrate with register allocator
Questions
Answers to questions at end of lecture notes:
1. How can you implement the data structures for an intermediate representation as defined in this lecture?
This is a very good question that I should answer before I write code
2. What are the advantages of working with a 3-address intermediate representation compared to a 2-address representation and vice versa?
3. What are the advantages and disadvantages of using macro expansion for instruction selection, i.e., to associate exactly one instruction sequence to each individual piece of the intermediate language?
4. Why do many CPUs provide such an asymmetric set of instructions? Why do they not just provide us with all useful instructions and no special register requirements?
(My guess) Once upon a time, assembly instructions were written by hand, so the instruction set was optimized for humans to write. Instructions that are useful to human programmers are not necessarily the most useful for compilers (?)
Additionally, the special register requirements are likely due to maintaining backwards compatibility with legacy systems
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