Skip to content

Commit a3b57e6

Browse files
committed
update
1 parent 2939ddb commit a3b57e6

File tree

5 files changed

+53
-13
lines changed

5 files changed

+53
-13
lines changed

content/me.md

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ You can find my Curriculum Vitae [here](/cv.pdf).
4949

5050
__Research Mentoring @ UIUC__
5151

52-
<p class="text-left"><a href="https://www.linkedin.com/in/peizhe-liu/">Peizhe Liu</a> (Graduate Student, UIUC)</p> <p class="text-right">Oct 2023 - Present</p>
52+
<p class="text-left"><a href="https://www.linkedin.com/in/peizhe-liu/">Peizhe Liu</a> (Graduate Student, UIUC)</p> <p class="text-right">Oct 2023 - Aug 2025</p>
5353

5454
<p class="text-left"><a href="https://schai.me/">Siyuan Chai</a> (Graduate Student, UIUC)</p> <p class="text-right">Aug 2022 - Apr 2025</p>
5555

@@ -67,7 +67,7 @@ __Teaching Assistant @ NJIT__
6767

6868
## Experience
6969

70-
<p class="text-left"><b>Research Associate Intern (Network and Distributed Systems Lab)</b>, Hewlett Packard Labs</p> <p class="text-right">May 2025 - Aug 2025</p>
70+
<p class="text-left"><b>Research Associate Intern (Network and Distributed Systems Lab)</b>, Hewlett Packard Labs</p> <p class="text-right">May 2025 - (Aug 2026)</p>
7171
<br/>
7272
<br/>
7373
<br/>
@@ -93,12 +93,18 @@ __Teaching Assistant @ NJIT__
9393

9494
## Presentations and Talks
9595

96+
<p class="text-left"><b>EMT: An OS Framework for New Memory Translation Architectures</b></p>
97+
<br/>
98+
<p class="text-left">USENIX Symposium on Operating Systems Design and Implementation</p> <p class="text-right">Jul 9, 2025</p>
99+
<br/>
100+
96101
<p class="text-left"><b>Direct Memory Translation for Virtualized Clouds</b></p>
97102
<br/>
98103
<p class="text-left">Cornell University</p> <p class="text-right">Oct 10, 2024</p>
99104
<br/>
100105
<p class="text-left">ACM Int'l. Conf. on Architectural Support for Programming Languages and Operating Systems</p> <p class="text-right">May 1, 2024</p>
101106
<br/>
107+
102108
<p class="text-left"><b>HugeGPT: Storing Guest Page Tables on Host Huge Pages to Accelerate Address Translation</b></p>
103109
<br/>
104110
<p class="text-left">Int'l. Conf. on Parallel Architectures and Compilation Techniques</p> <p class="text-right">Oct 23, 2023</p>

content/publications.md

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -15,15 +15,15 @@ Siyuan Chai\*, __Jiyuan Zhang__\*, Jongyul Kim, Alan Wang, Fan Chung, Jovan Stoj
1515

1616
\* co-lead author
1717

18-
[\[ PDF \]](/papers/preprint-osdi25-emt.pdf)
18+
[\[ URL \]](https://www.usenix.org/conference/osdi25/presentation/chai-siyuan) [\[ PDF \]](/papers/osdi25-emt.pdf)
1919

2020
---
2121

2222
### HotOS '25
2323

24-
__Jiyuan Zhang__, Jongyul Kim, Chloe Alverti, Peizhe Liu, Weiwei Jia, and Tianyin Xu. "Multiplexing File Systems to Reap the Benefits of Storage Innovations without Friction". In _Proceedings of the ACM SIGOPS 20th Workshop on Hot Topics in Operating Systems (HotOS)_, May 2025.
24+
__Jiyuan Zhang__, Jongyul Kim, Chloe Alverti, Peizhe Liu, Weiwei Jia, and Tianyin Xu. "Rethinking Tiered Storage: Talk to File Systems, Not Device Drivers". In _Proceedings of the ACM SIGOPS 20th Workshop on Hot Topics in Operating Systems (HotOS)_, May 2025.
2525

26-
[\[ PDF \]](/papers/preprint-hotos25-mux.pdf)
26+
[\[ URL \]](https://doi.org/10.1145/3713082.3730383) [\[ PDF \]](/papers/hotos25-mux.pdf)
2727

2828
---
2929

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,32 @@
1+
---
2+
title: "M5: Mastering Page Migration and Memory Management for CXL-based Tiered Memory Systems"
3+
date: 2025-03-30
4+
url: /asplos25-m5/
5+
pubStatus: "ASPLOS '25"
6+
pubStatusColor: "#3D9970"
7+
author: [ "Yan Sun", "Jongyul Kim", "Zeduo Yu", "__Jiyuan Zhang__", "Siyuan Chai", "Michael Jaemin Kim", "Hwayong Nam", "Jaehyun Park", "Eojin Na", "Yifan Yuan", "Ren Wang", "Jung Ho Ahn", "Tianyin Xu", "Nam Sung Kim" ]
8+
description: "This paper first presents a CXL-driven profiling solution to precisely and transparently count the number of accesses to every 4KB page and 64B word in CXL DRAM. Second, using the profiling solution, this work uncovers that (1) widely used CPU-driven page-migration solutions often identify warm pages as hot pages, and (2) certain applications have sparse hot pages, where only a small percentage of words in each of these pages are frequently accessed. Besides, this work demonstrates that the performance overhead of identifying hot pages is sometimes high enough to degrade application performance. Lastly, this work presents M5, a platform designed to facilitate the development of effective CXL-driven page-migration solutions."
9+
summary: "This paper first presents a CXL-driven profiling solution to precisely and transparently count the number of accesses to every 4KB page and 64B word in CXL DRAM. Second, using the profiling solution, this work uncovers that (1) widely used CPU-driven page-migration solutions often identify warm pages as hot pages, and (2) certain applications have sparse hot pages, where only a small percentage of words in each of these pages are frequently accessed. Besides, this work demonstrates that the performance overhead of identifying hot pages is sometimes high enough to degrade application performance. Lastly, this work presents M5, a platform designed to facilitate the development of effective CXL-driven page-migration solutions."
10+
hasMore: true
11+
12+
---
13+
14+
---
15+
16+
##### Metadata
17+
18+
- DOI: [10.1145/3676641.3711999](https://doi.org/10.1145/3676641.3711999)
19+
- PDF: [Download Here](/papers/asplos25-m5.pdf)
20+
21+
---
22+
23+
##### Abstract
24+
25+
CXL has emerged as a promising memory interface that can cost-effectively expand the capacity and bandwidth of a memory system, complementing the traditional DDR interface. However, CXL DRAM presents 2-3x longer access latency than DDR DRAM, forming a tiered-memory system that demands an effective and efficient page-migration solution. Although many page-migration solutions have been proposed for past tiered-memory systems, they have achieved limited success. To tackle the challenge of managing tiered-memory systems, this work first presents a CXL-driven profiling solution to precisely and transparently count the number of accesses to every 4KB page and 64B word in CXL DRAM. Second, using the profiling solution, this work uncovers that (1) widely used CPU-driven page-migration solutions often identify warm pages as hot pages, and (2) certain applications have sparse hot pages, where only a small percentage of words in each of these pages are frequently accessed. Besides, this work demonstrates that the performance overhead of identifying hot pages is sometimes high enough to degrade application performance. Lastly, this work presents M5, a platform designed to facilitate the development of effective CXL-driven page-migration solutions, providing hardware-based hot-page and hot-word trackers in the CXL controller. On average, M5 can identify 47% hotter pages and offer 14% higher performance than the best CPU-driven page-migration solution, even with a simple policy.
26+
27+
---
28+
29+
##### Citation
30+
31+
Yan Sun, Jongyul Kim, Zeduo Yu, Jiyuan Zhang, Siyuan Chai, Michael Jaemin Kim, Hwayong Nam, Jaehyun Park, Eojin Na, Yifan Yuan, Ren Wang, Jung Ho Ahn, Tianyin Xu, and Nam Sung Kim. "M5: Mastering Page Migration and Memory Management for CXLbased Tiered Memory Systems". In _Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2 (ASPLOS ’25)_, Mar 2025.
32+
Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,12 @@
11
---
2-
title: "Multiplexing File Systems to Reap the Benefits of Storage Innovations without Friction"
2+
title: "Rethinking Tiered Storage: Talk to File Systems, Not Device Drivers"
33
date: 2025-05-14
44
url: /hotos25-mux/
55
pubStatus: "HotOS '25"
66
pubStatusColor: "#3D9970"
77
author: [ "__Jiyuan Zhang__", "Jongyul Kim", "Chloe Alverti", "Peizhe Liu", "Weiwei Jia", "Tianyin Xu" ]
8-
description: "This paper presents the Multiplexer, a new direction that realizes tiering by directly multiplexing device-specific file systems. We demonstrate that such a design can not only handle data dependencies and event ordering correctly, but also improve performance via parallelism. More importantly, its separation of concerns—tiering and device specialization—enables progressive evolution and flexible integration of heterogeneous storage systems."
9-
summary: "This paper presents the Multiplexer, a new direction that realizes tiering by directly multiplexing device-specific file systems. We demonstrate that such a design can not only handle data dependencies and event ordering correctly, but also improve performance via parallelism. More importantly, its separation of concerns—tiering and device specialization—enables progressive evolution and flexible integration of heterogeneous storage systems."
8+
description: "This paper presents Mux, a new tiered file system that accesses different device types indirectly through device-specific file systems, rather than directly through device drivers. Despite introducing an additional indirection layer, we show that Mux significantly outperforms Strata, a research tiered file system, because it utilizes specialized production-ready file systems."
9+
summary: "This paper presents Mux, a new tiered file system that accesses different device types indirectly through device-specific file systems, rather than directly through device drivers. Despite introducing an additional indirection layer, we show that Mux significantly outperforms Strata, a research tiered file system, because it utilizes specialized production-ready file systems."
1010
hasMore: true
1111

1212
---
@@ -15,17 +15,18 @@ hasMore: true
1515

1616
##### Metadata
1717

18-
- PDF: [Download Here](/papers/preprint-hotos25-mux.pdf)
18+
- DOI: [10.1145/3713082.3730383](https://doi.org/10.1145/3713082.3730383)
19+
- PDF: [Download Here](/papers/hotos25-mux.pdf)
1920

2021
---
2122

2223
##### Abstract
2324

24-
The emergence of storage technologies has been driving active developments of many new file systems specialized for new devices. A tiered file system is a common design for heterogeneous storage systems composed of different devices. We argue that tiered file systems inevitably lag behind device-specific file systems and are inherently hard to evolve for new devices. In this paper, we explore a new direction that realizes tiering by directly multiplexing device-specific file systems. We describe a new design that (1) modularizes tiering policies (e.g., data distribution, migration, and replication) in a system-wide multiplexer, (2) dispatches reads and writes to device-specific file systems as per policy, and (3) conforms to the existing interface (Linux VFS) and thus is transparent to user applications. We demonstrate that such a design can not only handle data dependencies and event ordering correctly, but also improve performance via parallelism. More importantly, its separation of concerns—tiering and device specialization—enables progressive evolution and flexible integration of heterogeneous storage systems.
25+
Different storage technologies motivate the development of specialized file systems tailored to specific device types. A tiered file system aggregates such device types into a single file system. We argue that the current practice of developing tiered file systems tends to lag behind that of device-specific file systems because, inherently, developers are burdened with addressing multiple device types simultaneously, rather than specializing. We propose to solve this problem using Mux, a new tiered file system that accesses different device types indirectly through device-specific file systems, rather than directly through device drivers. Despite introducing an additional indirection layer, we show that Mux significantly outperforms Strata, a research tiered file system, because it utilizes specialized production-ready file systems. Compared with direct access to per-device file systems (with no tiering), Mux adds a worst-case read latency overhead of 6.6% to 87.3%, and a write throughout overhead of 1.6% to 3.5% across devices. We contend that Mux's separation of tiering and specialization concerns enables progressive evolution and flexible integration of heterogeneous storage devices.
2526

2627
---
2728

2829
##### Citation
2930

30-
Jiyuan Zhang, Jongyul Kim, Chloe Alverti, Peizhe Liu, Weiwei Jia, and Tianyin Xu. "Multiplexing File Systems to Reap the Benefits of Storage Innovations without Friction". In _Proceedings of the ACM SIGOPS 20th Workshop on Hot Topics in Operating Systems (HotOS)_, May 2025.
31+
Jiyuan Zhang, Jongyul Kim, Chloe Alverti, Peizhe Liu, Weiwei Jia, and Tianyin Xu. "Rethinking Tiered Storage: Talk to File Systems, Not Device Drivers". In _Proceedings of the ACM SIGOPS 20th Workshop on Hot Topics in Operating Systems (HotOS)_, May 2025.
3132

content/researcher/2025-osdi-emt.md

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15,15 +15,16 @@ hasMore: true
1515

1616
##### Metadata
1717

18-
- PDF: [Download Here](/papers/preprint-osdi25-emt.pdf)
18+
- URL: [USENIX OSDI '25](https://www.usenix.org/conference/osdi25/presentation/chai-siyuan)
19+
- PDF: [Download Here](/papers/osdi25-emt.pdf)
1920

2021
---
2122

2223
##### Abstract
2324

2425
With terabyte-scale memory capacity and memory-intensive workloads, memory translation has become a major performance bottleneck. Many novel hardware schemes are developed to speed up memory translation, but few are experimented with commodity OSes. A main reason is that memory management in major OSes, like Linux, does not have the extensibility to empower emerging hardware schemes.
2526

26-
We develop EMT, a pragmatic framework atop Linux to empower different hardware schemes of memory translation such as radix tree and hash table. EMT provides an architectureneutral interface that 1) supports diverse memory translation architectures, 2) enables hardware-specific optimizations, 3) accommodates modern hardware and OS complexity, and 4) has negligible overhead over hardwired implementations. We port Linux’s memory management onto EMT and show that EMT enables extensibility without sacrificing performance. We use EMT to implement OS support for ECPT and FPT, two recent experimental translation schemes for fast translation; EMT enables us to understand the OS perspective of these architectures and further optimize their designs.
27+
We develop EMT, a pragmatic framework atop Linux to empower different hardware schemes of memory translation such as radix tree and hash table. EMT provides an architecture neutral interface that 1) supports diverse memory translation architectures, 2) enables hardware-specific optimizations, 3) accommodates modern hardware and OS complexity, and 4) has negligible overhead over hardwired implementations. We port Linux’s memory management onto EMT and show that EMT enables extensibility without sacrificing performance. We use EMT to implement OS support for ECPT and FPT, two recent experimental translation schemes for fast translation; EMT enables us to understand the OS perspective of these architectures and further optimize their designs.
2728

2829
---
2930

0 commit comments

Comments
 (0)