info.yaml

# Tiny Tapeout project information
project:
  title:        "Siliconimist Demoscene"
  author:       "John Cole - Siliconimist"
  discord:      "johnisleaping_24391"
  description:  "Bouncing Siliconimist logo on rasterbars with Korobeiniki chiptune"
  language:     "Verilog"
  clock_hz:     25175000

  # How many tiles your design occupies? A single tile is about 167x108 uM.
  tiles: "1x1"

  # Top module name must start with "tt_um_".
  top_module:  "tt_um_siliconimist"

  # List your project's source files here.
  # Source files must be in ./src and you must list each source file separately, one per line.
  # Don't forget to also update `PROJECT_SOURCES` in test/Makefile.
  source_files:
    - "project.v"
    - "hvsync_generator.v"
    - "palette.v"
    - "bitmap_rom.v"
    - "text_scroller.v"
    - "chiptune.v"

# The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins.
# This section is for the datasheet/website. Use descriptive names (e.g., RX, TX, MOSI, SCL, SEG_A, etc.).
pinout:
  # Inputs
  ui[0]: "cfg_tile (tiles the logo)"
  ui[1]: ""
  ui[2]: "mute (mutes the audio)"
  ui[3]: ""
  ui[4]: ""
  ui[5]: ""
  ui[6]: ""
  ui[7]: ""

  # Outputs (TinyVGA Pmod)
  uo[0]: "R1"
  uo[1]: "G1"
  uo[2]: "B1"
  uo[3]: "vsync"
  uo[4]: "R0"
  uo[5]: "G0"
  uo[6]: "B0"
  uo[7]: "hsync"

  # Bidirectional pins (Audio Pmod on uio[7])
  uio[0]: ""
  uio[1]: ""
  uio[2]: ""
  uio[3]: ""
  uio[4]: ""
  uio[5]: ""
  uio[6]: ""
  uio[7]: "PWM audio out"

# Do not change!
yaml_version: 6