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uboot/k230/cpu: disable maee/pmp for boot_baremetal
This patch provides RISC-V standard M-mode env for boot_baremetal command users. It doesn't affect K230 SDK boot behaviors. The boot_baremetal command now supports idle wait when additional parameter is given, thus its behavior is same as before when the extra parameter is not given. Signed-off-by: Yanfeng Liu <[email protected]>
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+38
-12
lines changed
  • src/little/uboot/arch/riscv/cpu/k230

1 file changed

+38
-12
lines changed

src/little/uboot/arch/riscv/cpu/k230/cpu.c

Lines changed: 38 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -36,23 +36,38 @@
3636
#include <linux/delay.h>
3737
#include "platform.h"
3838

39-
static inline void improving_cpu_performance(void)
39+
static void improving_cpu_performance(bool maee)
4040
{
4141
/* Set cpu regs */
4242
csr_write(CSR_MCOR, 0x70013);
4343
csr_write(CSR_MCCR2, 0xe0000009);
4444
csr_write(CSR_MHCR, 0x11ff); //Enable L1 Cache
45-
csr_write(CSR_MXSTATUS, 0x638000);
45+
csr_write(CSR_MXSTATUS, maee?0x638000:0x438000);
4646
csr_write(CSR_MHINT, 0x6e30c);
4747

4848
csr_write(CSR_SMPEN, 0x1);
4949
}
5050

51+
static void enforce_pmp(void)
52+
{
53+
//start addr:0x24484c00<<2=0x91213000 len=1<<9 * 8 = 4KB
54+
csr_write(pmpaddr0, 0x24484dff);
55+
//start addr:0x24485000<<2=0x91214000 len=1<<9 * 8 = 4KB
56+
csr_write(pmpaddr1, 0x244851ff);
57+
// lock them as readonly
58+
csr_write(pmpcfg0, 0x9999);
59+
}
60+
61+
static void idle_wait(void){
62+
while(1) {
63+
asm volatile("wfi");
64+
}
65+
}
66+
5167
/*
5268
* cleanup_before_linux() is called just before we call linux
53-
* it prepares the processor for linux
69+
* it prepares the processor with MAEE on and PMP set
5470
*
55-
* we disable interrupt and caches.
5671
*/
5772
int cleanup_before_linux(void)
5873
{
@@ -65,11 +80,24 @@ int cleanup_before_linux(void)
6580
// csi_l2cache_flush_invalid();
6681
asm volatile(".long 0x0170000b\n":::"memory");
6782

68-
improving_cpu_performance();
83+
improving_cpu_performance(true); /* MAEE on */
6984

85+
enforce_pmp();
7086
return 0;
7187
}
7288

89+
/*
90+
* cleanup_std_riscv() prepares CPU with MAEE off and PMP open
91+
*/
92+
void cleanup_std_riscv(void)
93+
{
94+
cache_flush();
95+
icache_disable();
96+
dcache_disable();
97+
asm volatile(".long 0x0170000b\n":::"memory");
98+
improving_cpu_performance(false); /* MAEE off */
99+
}
100+
73101
void harts_early_init(void)
74102
{
75103
/*enable mtimer clk*/
@@ -79,11 +107,7 @@ void harts_early_init(void)
79107

80108
writel(0x80199805, (void*)0x91100004);
81109

82-
csr_write(pmpaddr0, 0x24484dff);//start addr:0x24484c00<<2=0x91213000 len=1<<9 * 8 = 4KB
83-
csr_write(pmpaddr1, 0x244851ff);//start addr:0x24485000<<2=0x91214000 len=1<<9 * 8 = 4KB
84-
csr_write(pmpcfg0, 0x9999);
85-
86-
//improving_cpu_performance();
110+
/* defer PMP until booting linux */
87111
}
88112
u32 spl_boot_device(void)
89113
{
@@ -114,9 +138,11 @@ static int k230_boot_baremetal(struct cmd_tbl *cmdtp, int flag, int argc,
114138
writel(0x10001,(void*)0x9110100c);
115139
udelay(100);
116140
writel(0x10000,(void*)0x9110100c);
141+
if (argc>4) idle_wait();
117142
}
118143
else
119144
{
145+
cleanup_std_riscv();
120146
func_app_entry app_entry = (void *)(long)boot_address;
121147
app_entry();
122148
}
@@ -125,9 +151,9 @@ static int k230_boot_baremetal(struct cmd_tbl *cmdtp, int flag, int argc,
125151
}
126152

127153
U_BOOT_CMD_COMPLETE(
128-
boot_baremetal, 4, 1, k230_boot_baremetal,
154+
boot_baremetal, 5, 1, k230_boot_baremetal,
129155
"boot_baremetal",
130-
"\n boot_baremetal cpu addr size\n", NULL
156+
"\n boot_baremetal cpu addr size [wait]\n", NULL
131157
);
132158

133159

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