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Treat names starting with _ as bad names in IExpand
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7 files changed

+105
-105
lines changed

7 files changed

+105
-105
lines changed

src/Libraries/Base1/Prelude.bs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2573,7 +2573,7 @@ messageM s = do
25732573
--@ endfunction: id
25742574
--@ \end{libverbatim}
25752575
id :: a -> a
2576-
id x = x
2576+
id _x = _x
25772577

25782578
--@ Make a function curried
25792579
--@ \index{curry@\te{curry} (Prelude function)}

src/comp/IExpand.hs

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -285,7 +285,10 @@ iExpand errh flags symt alldefs is_noinlined_func pps def@(IDef mi _ _ _) = do
285285
t = iGetType e
286286
-- the name for the new IDef being created
287287
i = case expr_name of
288-
Just name ->
288+
-- Heuristic: treat names starting with _ as bad names,
289+
-- as these may come from the arguments of functions like
290+
-- id _x = _x
291+
Just name | not (isEmptyId name) && head (getIdBaseString name) /= '_' ->
289292
setKeepId $
290293
mkIdPost name (mkFString (iExpandPref ++ show p))
291294
_ ->

testsuite/bsc.bugs/bluespec_inc/b302/mkDesign.v.expected

Lines changed: 73 additions & 76 deletions
Original file line numberDiff line numberDiff line change
@@ -46,108 +46,105 @@ module mkDesign(clk,
4646
wire [10 : 0] result;
4747

4848
// remaining internal signals
49-
wire [5 : 0] _0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_I_ETC___d55,
50-
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_r_ETC___d56,
51-
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_ETC___d57,
52-
_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_ETC___d58,
53-
_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_IN_ETC___d59,
54-
x__h144,
55-
x__h146,
56-
x__h240,
57-
x__h242,
58-
x__h336,
59-
x__h338,
60-
x__h432,
61-
x__h434,
62-
x__h528,
63-
x__h530,
64-
y__h147;
65-
wire [4 : 0] IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCA_ETC___d54,
49+
wire [5 : 0] _0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_I_ETC___d45,
50+
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_r_ETC___d36,
51+
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_ETC___d27,
52+
_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_ETC___d18,
53+
_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_IN_ETC___d9,
54+
x__h353,
55+
x__h355,
56+
x__h431,
57+
x__h433,
58+
x__h509,
59+
x__h511,
60+
x__h587,
61+
x__h589,
62+
x__h665,
63+
x__h667,
64+
y__h356;
65+
wire [4 : 0] IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCA_ETC___d42,
6666
IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCA_ETC__q4,
67-
IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_B_ETC___d53,
67+
IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_B_ETC___d33,
6868
IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_B_ETC__q3,
69-
IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_P_ETC___d52,
69+
IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_P_ETC___d24,
7070
IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_P_ETC__q2,
71-
IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_ETC___d51,
71+
IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_ETC___d15,
7272
IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_ETC__q1,
73-
_theResult_____1_snd__h939,
74-
notB__h48,
75-
quotient__h63;
73+
notB__h247,
74+
quotient__h262;
7675

7776
// value method result
7877
assign result =
7978
{ result_a[9:5] >= result_b,
80-
_theResult_____1_snd__h939,
81-
quotient__h63 } ;
79+
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_I_ETC___d45[5] ?
80+
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_I_ETC___d45[4:0] :
81+
IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCA_ETC___d42,
82+
quotient__h262 } ;
8283

8384
// remaining internal signals
84-
assign IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCA_ETC___d54 =
85+
assign IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCA_ETC___d42 =
8586
{ IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCA_ETC__q4[3:0],
8687
result_a[0] } ;
8788
assign IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCA_ETC__q4 =
88-
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_r_ETC___d56[5] ?
89-
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_r_ETC___d56[4:0] :
90-
IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_B_ETC___d53 ;
91-
assign IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_B_ETC___d53 =
89+
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_r_ETC___d36[5] ?
90+
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_r_ETC___d36[4:0] :
91+
IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_B_ETC___d33 ;
92+
assign IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_B_ETC___d33 =
9293
{ IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_B_ETC__q3[3:0],
9394
result_a[1] } ;
9495
assign IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_B_ETC__q3 =
95-
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_ETC___d57[5] ?
96-
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_ETC___d57[4:0] :
97-
IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_P_ETC___d52 ;
98-
assign IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_P_ETC___d52 =
96+
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_ETC___d27[5] ?
97+
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_ETC___d27[4:0] :
98+
IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_P_ETC___d24 ;
99+
assign IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_P_ETC___d24 =
99100
{ IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_P_ETC__q2[3:0],
100101
result_a[2] } ;
101102
assign IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_P_ETC__q2 =
102-
_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_ETC___d58[5] ?
103-
_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_ETC___d58[4:0] :
104-
IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_ETC___d51 ;
105-
assign IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_ETC___d51 =
103+
_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_ETC___d18[5] ?
104+
_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_ETC___d18[4:0] :
105+
IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_ETC___d15 ;
106+
assign IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_ETC___d15 =
106107
{ IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_ETC__q1[3:0],
107108
result_a[3] } ;
108109
assign IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_ETC__q1 =
109-
_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_IN_ETC___d59[5] ?
110-
_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_IN_ETC___d59[4:0] :
110+
_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_IN_ETC___d9[5] ?
111+
_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_IN_ETC___d9[4:0] :
111112
result_a[8:4] ;
112-
assign _0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_I_ETC___d55 =
113-
x__h144 + 6'd1 ;
114-
assign _0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_r_ETC___d56 =
115-
x__h240 + 6'd1 ;
116-
assign _0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_ETC___d57 =
117-
x__h336 + 6'd1 ;
118-
assign _0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_ETC___d58 =
119-
x__h432 + 6'd1 ;
120-
assign _0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_IN_ETC___d59 =
121-
x__h528 + 6'd1 ;
122-
assign _theResult_____1_snd__h939 =
123-
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_I_ETC___d55[5] ?
124-
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_I_ETC___d55[4:0] :
125-
IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCA_ETC___d54 ;
126-
assign notB__h48 = ~result_b ;
127-
assign quotient__h63 =
128-
{ _0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_IN_ETC___d59[5],
129-
_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_ETC___d58[5],
130-
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_ETC___d57[5],
131-
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_r_ETC___d56[5],
132-
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_I_ETC___d55[5] } ;
133-
assign x__h144 = x__h146 + y__h147 ;
134-
assign x__h146 =
113+
assign _0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_I_ETC___d45 =
114+
x__h353 + 6'd1 ;
115+
assign _0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_r_ETC___d36 =
116+
x__h431 + 6'd1 ;
117+
assign _0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_ETC___d27 =
118+
x__h509 + 6'd1 ;
119+
assign _0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_ETC___d18 =
120+
x__h587 + 6'd1 ;
121+
assign _0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_IN_ETC___d9 =
122+
x__h665 + 6'd1 ;
123+
assign notB__h247 = ~result_b ;
124+
assign quotient__h262 =
125+
{ _0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_IN_ETC___d9[5],
126+
_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_ETC___d18[5],
127+
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_ETC___d27[5],
128+
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_r_ETC___d36[5],
129+
_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_I_ETC___d45[5] } ;
130+
assign x__h353 = x__h355 + y__h356 ;
131+
assign x__h355 =
135132
{ 1'd0,
136-
IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCA_ETC___d54 } ;
137-
assign x__h240 = x__h242 + y__h147 ;
138-
assign x__h242 =
133+
IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCA_ETC___d42 } ;
134+
assign x__h431 = x__h433 + y__h356 ;
135+
assign x__h433 =
139136
{ 1'd0,
140-
IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_B_ETC___d53 } ;
141-
assign x__h336 = x__h338 + y__h147 ;
142-
assign x__h338 =
137+
IF_0_CONCAT_IF_0_CONCAT_IF_0_CONCAT_result_a_B_ETC___d33 } ;
138+
assign x__h509 = x__h511 + y__h356 ;
139+
assign x__h511 =
143140
{ 1'd0,
144-
IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_P_ETC___d52 } ;
145-
assign x__h432 = x__h434 + y__h147 ;
146-
assign x__h434 =
141+
IF_0_CONCAT_IF_0_CONCAT_result_a_BITS_8_TO_4_P_ETC___d24 } ;
142+
assign x__h587 = x__h589 + y__h356 ;
143+
assign x__h589 =
147144
{ 1'd0,
148-
IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_ETC___d51 } ;
149-
assign x__h528 = x__h530 + y__h147 ;
150-
assign x__h530 = { 1'd0, result_a[8:4] } ;
151-
assign y__h147 = { 1'd0, notB__h48 } ;
145+
IF_0_CONCAT_result_a_BITS_8_TO_4_PLUS_0_CONCAT_ETC___d15 } ;
146+
assign x__h665 = x__h667 + y__h356 ;
147+
assign x__h667 = { 1'd0, result_a[8:4] } ;
148+
assign y__h356 = { 1'd0, notB__h247 } ;
152149
endmodule // mkDesign
153150

testsuite/bsc.misc/lambda_calculus/lc-sysMultiArityConcat.out.expected

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -27,12 +27,12 @@ dim_sysMultiArityConcat =
2727
rule_RL_d_sysMultiArityConcat :: MOD_sysMultiArityConcat -> (Bool, MOD_sysMultiArityConcat, ());
2828
rule_RL_d_sysMultiArityConcat =
2929
(\ (state0 :: MOD_sysMultiArityConcat) ->
30-
let { (def__read__h44 :: Bit #3) = meth_read_RegUN (inst_src1__sysMultiArityConcat state0)
31-
; (def__read__h76 :: Bit #4) = meth_read_RegUN (inst_src2__sysMultiArityConcat state0)
32-
; (def__read__h108 :: Bit #5) = meth_read_RegUN (inst_src3__sysMultiArityConcat state0)
30+
let { (def_src1___d1 :: Bit #3) = meth_read_RegUN (inst_src1__sysMultiArityConcat state0)
31+
; (def_src2___d2 :: Bit #4) = meth_read_RegUN (inst_src2__sysMultiArityConcat state0)
32+
; (def_src3___d3 :: Bit #5) = meth_read_RegUN (inst_src3__sysMultiArityConcat state0)
3333
; (act1 :: (Bool, MOD_RegUN #12, ())) =
3434
meth_write_RegUN
35-
(primConcat def__read__h44 (primConcat def__read__h76 def__read__h108))
35+
(primConcat def_src1___d1 (primConcat def_src2___d2 def_src3___d3))
3636
(inst_snk__sysMultiArityConcat state0)
3737
; (guard1 :: Bool) = fst3 act1
3838
; (state1 :: MOD_sysMultiArityConcat) = state0 { inst_snk__sysMultiArityConcat = snd3 act1 }

testsuite/bsc.misc/lambda_calculus/lc-sysStructs.out.expected

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -45,25 +45,25 @@ dim_sysStructs =
4545
rule_RL_add_em_sysStructs :: MOD_sysStructs -> (Bool, MOD_sysStructs, ());
4646
rule_RL_add_em_sysStructs =
4747
(\ (state0 :: MOD_sysStructs) ->
48-
let { (def_x__h549 :: Bit #9) = meth_read_RegN (inst_a__sysStructs state0)
49-
; (def_x__h557 :: Bit #9) = meth_read_RegN (inst_b__sysStructs state0)
50-
; (def_x__h541 :: Bit #9) = primAdd def_x__h549 def_x__h557
51-
; (def_x__h529 :: Bit #9) = primAdd def_x__h541 (4 :: Bit #9)
52-
; (def_s__h482 :: Bit #1) = meth_read_RegN (inst_s__sysStructs state0)
53-
; (act1 :: (Bool, MOD_RegN #9, ())) = meth_write_RegN def_x__h529 (inst_a__sysStructs state0)
48+
let { (def_x__h542 :: Bit #9) = meth_read_RegN (inst_a__sysStructs state0)
49+
; (def_x__h550 :: Bit #9) = meth_read_RegN (inst_b__sysStructs state0)
50+
; (def_x__h534 :: Bit #9) = primAdd def_x__h542 def_x__h550
51+
; (def_x__h522 :: Bit #9) = primAdd def_x__h534 (4 :: Bit #9)
52+
; (def_s__h463 :: Bit #1) = meth_read_RegN (inst_s__sysStructs state0)
53+
; (act1 :: (Bool, MOD_RegN #9, ())) = meth_write_RegN def_x__h522 (inst_a__sysStructs state0)
5454
; (guard1 :: Bool) = fst3 act1
5555
; (state1 :: MOD_sysStructs) = state0 { inst_a__sysStructs = snd3 act1 }
5656
; (act2 :: (Bool, MOD_RegN #1, ())) = meth_write_RegN (0 :: Bit #1) (inst_s__sysStructs state1)
5757
; (guard2 :: Bool) = guard1 && (fst3 act2)
5858
; (state2 :: MOD_sysStructs) = state1 { inst_s__sysStructs = snd3 act2 }
5959
}
60-
in mktuple ((bitToBool def_s__h482) && guard2) state2 ());
60+
in mktuple ((bitToBool def_s__h463) && guard2) state2 ());
6161

6262
rule_RL_tss_sysStructs :: MOD_sysStructs -> (Bool, MOD_sysStructs, ());
6363
rule_RL_tss_sysStructs =
6464
(\ (state0 :: MOD_sysStructs) ->
65-
let { (def_t1___d8 :: Bit #12) = meth_read_RegUN (inst_t1__sysStructs state0)
66-
; (def_t2___d6 :: Bit #12) = meth_read_RegUN (inst_t2__sysStructs state0)
65+
let { (def_t2___d6 :: Bit #12) = meth_read_RegUN (inst_t2__sysStructs state0)
66+
; (def_t1___d8 :: Bit #12) = meth_read_RegUN (inst_t1__sysStructs state0)
6767
; (act1 :: (Bool, MOD_RegUN #12, ())) =
6868
meth_write_RegUN
6969
(primConcat

testsuite/bsc.misc/sal/CTX_sysMultiArityConcat.sal.expected

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -16,12 +16,12 @@ BEGIN
1616
#) ;
1717

1818
rule_RL_d (state0 : STATE) : [ BOOLEAN, STATE ] =
19-
LET def__read__h44 : Bit{3}!T = CTX_RegUN{3}!meth_read(state0.inst_src1)
20-
IN LET def__read__h76 : Bit{4}!T = CTX_RegUN{4}!meth_read(state0.inst_src2)
21-
IN LET def__read__h108 : Bit{5}!T = CTX_RegUN{5}!meth_read(state0.inst_src3)
19+
LET def_src1___d1 : Bit{3}!T = CTX_RegUN{3}!meth_read(state0.inst_src1)
20+
IN LET def_src2___d2 : Bit{4}!T = CTX_RegUN{4}!meth_read(state0.inst_src2)
21+
IN LET def_src3___d3 : Bit{5}!T = CTX_RegUN{5}!meth_read(state0.inst_src3)
2222
IN LET act1 : [ CTX_RegUN{12}!STATE, Unit!T ] =
23-
CTX_RegUN{12}!meth_write(Prim2{3,9}!primConcat(def__read__h44,
24-
Prim2{4,5}!primConcat(def__read__h76, def__read__h108)),
23+
CTX_RegUN{12}!meth_write(Prim2{3,9}!primConcat(def_src1___d1,
24+
Prim2{4,5}!primConcat(def_src2___d2, def_src3___d3)),
2525
state0.inst_snk)
2626
IN LET state1 : STATE = state0 WITH .inst_snk := act1.1
2727
IN ( TRUE, state1 ) ;

testsuite/bsc.misc/sal/CTX_sysStructs.sal.expected

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -28,21 +28,21 @@ BEGIN
2828
#) ;
2929

3030
rule_RL_add_em (state0 : STATE) : [ BOOLEAN, STATE ] =
31-
LET def_x__h549 : Bit{9}!T = CTX_RegN{9}!meth_read(state0.inst_a)
32-
IN LET def_x__h557 : Bit{9}!T = CTX_RegN{9}!meth_read(state0.inst_b)
33-
IN LET def_x__h541 : Bit{9}!T = Prim1{9}!primAdd(def_x__h549, def_x__h557)
34-
IN LET def_x__h529 : Bit{9}!T = Prim1{9}!primAdd(def_x__h541, Bit{9}!mkConst(4))
35-
IN LET def_s__h482 : Bit{1}!T = CTX_RegN{1}!meth_read(state0.inst_s)
36-
IN LET act1 : [ CTX_RegN{9}!STATE, Unit!T ] = CTX_RegN{9}!meth_write(def_x__h529, state0.inst_a)
31+
LET def_x__h542 : Bit{9}!T = CTX_RegN{9}!meth_read(state0.inst_a)
32+
IN LET def_x__h550 : Bit{9}!T = CTX_RegN{9}!meth_read(state0.inst_b)
33+
IN LET def_x__h534 : Bit{9}!T = Prim1{9}!primAdd(def_x__h542, def_x__h550)
34+
IN LET def_x__h522 : Bit{9}!T = Prim1{9}!primAdd(def_x__h534, Bit{9}!mkConst(4))
35+
IN LET def_s__h463 : Bit{1}!T = CTX_RegN{1}!meth_read(state0.inst_s)
36+
IN LET act1 : [ CTX_RegN{9}!STATE, Unit!T ] = CTX_RegN{9}!meth_write(def_x__h522, state0.inst_a)
3737
IN LET state1 : STATE = state0 WITH .inst_a := act1.1
3838
IN LET act2 : [ CTX_RegN{1}!STATE, Unit!T ] =
3939
CTX_RegN{1}!meth_write(Bit{1}!mkConst(0), state1.inst_s)
4040
IN LET state2 : STATE = state1 WITH .inst_s := act2.1
41-
IN ( Prim!bitToBool(def_s__h482), state2 ) ;
41+
IN ( Prim!bitToBool(def_s__h463), state2 ) ;
4242

4343
rule_RL_tss (state0 : STATE) : [ BOOLEAN, STATE ] =
44-
LET def_t1___d8 : Bit{12}!T = CTX_RegUN{12}!meth_read(state0.inst_t1)
45-
IN LET def_t2___d6 : Bit{12}!T = CTX_RegUN{12}!meth_read(state0.inst_t2)
44+
LET def_t2___d6 : Bit{12}!T = CTX_RegUN{12}!meth_read(state0.inst_t2)
45+
IN LET def_t1___d8 : Bit{12}!T = CTX_RegUN{12}!meth_read(state0.inst_t1)
4646
IN LET act1 : [ CTX_RegUN{12}!STATE, Unit!T ] =
4747
CTX_RegUN{12}!meth_write(Prim2{8,4}!primConcat(Prim2{12,8}!primExtract(def_t2___d6),
4848
Prim2{12,4}!primExtract(def_t1___d8)),

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