cores/lcd/ssd1306: fix ready signal

Author: povauboin

lambdalib/cores/lcd/ssd1306.py

@@ -189,14 +189,14 @@ def elaborate(self, platform):
         with m.FSM():
             with m.State("UNKNOWN"):
                 with m.If(self.reset | self.por_init):
+                    m.d.sync += self.ready.eq(0)
                     m.next = "RESET"
 
             with m.State("RESET"):
                 m.d.comb += [
                     init   .rewind.eq(1),
                     display.rewind.eq(1),
                 ]
-                m.d.sync += self.ready.eq(0)
                 m.next = "INIT"
 
             with m.State("INIT"):
@@ -212,6 +212,7 @@ def elaborate(self, platform):
 
             with m.State("DISPLAY"):
                 with m.If(self.reset):
+                    m.d.sync += self.ready.eq(0)
                     m.next = "RESET"
 
                 # Send the appropriate sequence to prepare