We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent b9885f9 commit 4d1ddf9Copy full SHA for 4d1ddf9
src/Init/Data/BitVec/Bitblast.lean
@@ -1806,7 +1806,7 @@ theorem neg_toInt_neg_umod_eq_of_msb_true_msb_true {x y : BitVec w} (hx : x.msb
1806
theorem toInt_smod {x y : BitVec w} :
1807
(x.smod y).toInt = x.toInt.fmod y.toInt := by
1808
rcases w with _|w ; simp [of_length_zero]
1809
- by_cases hyzero : y = 0#(w + 1) ; simp [hyzero]
+ by_cases hyzero : y = 0#(w + 1); simp [hyzero]
1810
have hypos : 0 < y.toNat := by simp [toNat_eq] at hyzero; omega
1811
rw [smod_eq]
1812
cases hxmsb : x.msb <;> cases hymsb : y.msb
0 commit comments