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Update src/Init/Data/BitVec/Bitblast.lean
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src/Init/Data/BitVec/Bitblast.lean

Lines changed: 1 addition & 1 deletion
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@@ -1806,7 +1806,7 @@ theorem neg_toInt_neg_umod_eq_of_msb_true_msb_true {x y : BitVec w} (hx : x.msb
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theorem toInt_smod {x y : BitVec w} :
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(x.smod y).toInt = x.toInt.fmod y.toInt := by
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rcases w with _|w ; simp [of_length_zero]
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by_cases hyzero : y = 0#(w + 1) ; simp [hyzero]
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by_cases hyzero : y = 0#(w + 1); simp [hyzero]
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have hypos : 0 < y.toNat := by simp [toNat_eq] at hyzero; omega
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rw [smod_eq]
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cases hxmsb : x.msb <;> cases hymsb : y.msb

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