77
88prelude
99public import Std.Tactic.BVDecide.Bitblast.BVExpr.Circuit.Impl.Pred
10+ import Init.Grind
1011
1112@[expose] public section
1213
@@ -38,77 +39,48 @@ where
3839 let ret := aig.mkNotCached exprRef
3940 have := LawfulOperator.le_size (f := mkNotCached) ..
4041 let cache := cache.cast this
41- have := by
42- apply LawfulOperator.le_size_of_le_aig_size (f := mkNotCached)
43- exact hexpr
44- ⟨⟨ret, this⟩, cache⟩
42+ ⟨⟨ret, by grind⟩, cache⟩
4543 | .ite discr lhs rhs =>
4644 let ⟨⟨⟨aig, discrRef⟩, dextend⟩, cache⟩ := go aig discr cache
4745 let ⟨⟨⟨aig, lhsRef⟩, lextend⟩, cache⟩ := go aig lhs cache
4846 let ⟨⟨⟨aig, rhsRef⟩, rextend⟩, cache⟩ := go aig rhs cache
49- let discrRef := discrRef.cast <| by
50- dsimp only at lextend rextend ⊢
51- omega
52- let lhsRef := lhsRef.cast <| by
53- dsimp only at rextend ⊢
54- omega
55-
47+ let discrRef := discrRef.cast <| by lia
48+ let lhsRef := lhsRef.cast <| by lia
5649 let input := ⟨discrRef, lhsRef, rhsRef⟩
5750 let ret := aig.mkIfCached input
5851 have := LawfulOperator.le_size (f := mkIfCached) ..
5952 let cache := cache.cast this
60- have := by
61- apply LawfulOperator.le_size_of_le_aig_size (f := mkIfCached)
62- dsimp only at dextend lextend rextend
63- omega
64- ⟨⟨ret, this⟩, cache⟩
53+ ⟨⟨ret, by grind⟩, cache⟩
6554 | .gate g lhs rhs =>
6655 let ⟨⟨⟨aig, lhsRef⟩, lextend⟩, cache⟩ := go aig lhs cache
6756 let ⟨⟨⟨aig, rhsRef⟩, rextend⟩, cache⟩ := go aig rhs cache
68- let lhsRef := lhsRef.cast <| by
69- dsimp only at rextend ⊢
70- omega
57+ let lhsRef := lhsRef.cast <| by lia
7158 let input := ⟨lhsRef, rhsRef⟩
7259 match g with
7360 | .and =>
7461 let ret := aig.mkAndCached input
7562 have := LawfulOperator.le_size (f := mkAndCached) ..
7663 let cache := cache.cast this
77- have := by
78- apply LawfulOperator.le_size_of_le_aig_size (f := mkAndCached)
79- dsimp only at lextend rextend
80- omega
81- ⟨⟨ret, this⟩, cache⟩
64+ ⟨⟨ret, by grind⟩, cache⟩
8265 | .xor =>
8366 let ret := aig.mkXorCached input
8467 have := LawfulOperator.le_size (f := mkXorCached) ..
8568 let cache := cache.cast this
86- have := by
87- apply LawfulOperator.le_size_of_le_aig_size (f := mkXorCached)
88- dsimp only at lextend rextend
89- omega
90- ⟨⟨ret, this⟩, cache⟩
69+ ⟨⟨ret, by grind⟩, cache⟩
9170 | .beq =>
9271 let ret := aig.mkBEqCached input
9372 have := LawfulOperator.le_size (f := mkBEqCached) ..
9473 let cache := cache.cast this
95- have := by
96- apply LawfulOperator.le_size_of_le_aig_size (f := mkBEqCached)
97- dsimp only at lextend rextend
98- omega
99- ⟨⟨ret, this⟩, cache⟩
74+ ⟨⟨ret, by grind⟩, cache⟩
10075 | .or =>
10176 let ret := aig.mkOrCached input
10277 have := LawfulOperator.le_size (f := mkOrCached) ..
10378 let cache := cache.cast this
104- have := by
105- apply LawfulOperator.le_size_of_le_aig_size (f := mkOrCached)
106- dsimp only at lextend rextend
107- omega
108- ⟨⟨ret, this⟩, cache⟩
79+ ⟨⟨ret, by grind⟩, cache⟩
10980
11081namespace bitblast
11182
83+ @[grind! .]
11284theorem go_le_size (aig : AIG BVBit) (expr : BVLogicalExpr) (cache : BVExpr.Cache aig) :
11385 aig.decls.size ≤ (go aig expr cache).result.val.aig.decls.size :=
11486 (go aig expr cache).result.property
@@ -135,50 +107,9 @@ theorem go_decl_eq (idx) (aig : AIG BVBit) (cache : BVExpr.Cache aig) (h : idx <
135107 assumption
136108 | ite discr lhs rhs dih lih rih =>
137109 simp only [go]
138- rw [AIG.LawfulOperator.decl_eq (f := mkIfCached), rih, lih, dih]
139- · apply go_lt_size_of_lt_aig_size
140- assumption
141- · apply go_lt_size_of_lt_aig_size
142- apply go_lt_size_of_lt_aig_size
143- assumption
144- · apply go_lt_size_of_lt_aig_size
145- apply go_lt_size_of_lt_aig_size
146- apply go_lt_size_of_lt_aig_size
147- assumption
110+ grind
148111 | gate g lhs rhs lih rih =>
149- cases g with
150- | and =>
151- simp only [go]
152- rw [AIG.LawfulOperator.decl_eq (f := mkAndCached), rih, lih]
153- · apply go_lt_size_of_lt_aig_size
154- assumption
155- · apply go_lt_size_of_lt_aig_size
156- apply go_lt_size_of_lt_aig_size
157- assumption
158- | xor =>
159- simp only [go]
160- rw [AIG.LawfulOperator.decl_eq (f := mkXorCached), rih, lih]
161- · apply go_lt_size_of_lt_aig_size
162- assumption
163- · apply go_lt_size_of_lt_aig_size
164- apply go_lt_size_of_lt_aig_size
165- assumption
166- | beq =>
167- simp only [go]
168- rw [AIG.LawfulOperator.decl_eq (f := mkBEqCached), rih, lih]
169- · apply go_lt_size_of_lt_aig_size
170- assumption
171- · apply go_lt_size_of_lt_aig_size
172- apply go_lt_size_of_lt_aig_size
173- assumption
174- | or =>
175- simp only [go]
176- rw [AIG.LawfulOperator.decl_eq (f := mkOrCached), rih, lih]
177- · apply go_lt_size_of_lt_aig_size
178- assumption
179- · apply go_lt_size_of_lt_aig_size
180- apply go_lt_size_of_lt_aig_size
181- assumption
112+ cases g <;> (simp only [go]; grind)
182113
183114theorem go_isPrefix_aig {aig : AIG BVBit} (cache : BVExpr.Cache aig) :
184115 IsPrefix aig.decls (go aig expr cache).result.val.aig.decls := by
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