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2 | | -From: George Moussalem <george.moussalem@outlook.com> |
3 | | -Date: Wed, 03 Jun 2026 11:56:40 +0400 |
4 | | -Subject: [PATCH next-next] net: dsa: qca8k: Add support for force mode for fixed link topology |
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| 46 | +Date: Fri, 05 Jun 2026 12:11:29 +0400 |
| 47 | +Subject: [PATCH next-next v2] net: dsa: qca8k: Add support for force mode |
| 48 | + for fixed link topology |
| 49 | +Precedence: bulk |
| 50 | +X-Mailing-List: netdev@vger.kernel.org |
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9 | 60 | X-Change-ID: 20260603-qca8337-force-mode-fbcba5296446 |
| 61 | +To: Andrew Lunn <andrew@lunn.ch>, Vladimir Oltean <olteanv@gmail.com>, |
| 62 | + "David S. Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>, |
| 63 | + Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com> |
| 64 | +Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, |
| 65 | + George Moussalem <george.moussalem@outlook.com> |
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| 76 | +X-Original-From: George Moussalem <george.moussalem@outlook.com> |
| 77 | +Reply-To: george.moussalem@outlook.com |
| 78 | +From: George Moussalem <george.moussalem@outlook.com> |
| 79 | +X-Patchwork-Delegate: kuba@kernel.org |
| 80 | + |
| 81 | +From: George Moussalem <george.moussalem@outlook.com> |
10 | 82 |
|
11 | 83 | A fixed link topology is commonly used to connect this switch (on port |
12 | 84 | 0 or 6) to a SoC's MAC over SGMII. When inband negotiation is not used, |
13 | 85 | the switch needs to be configured to operate in force mode. As such, |
14 | 86 | enable support for force mode. |
15 | 87 |
|
| 88 | +Reviewed-by: Andrew Lunn <andrew@lunn.ch> |
16 | 89 | Signed-off-by: George Moussalem <george.moussalem@outlook.com> |
17 | 90 | --- |
18 | | - drivers/net/dsa/qca/qca8k-8xxx.c | 6 +++++- |
19 | | - drivers/net/dsa/qca/qca8k.h | 1 + |
20 | | - 2 files changed, 6 insertions(+), 1 deletion(-) |
| 91 | +Changes in v2: |
| 92 | +- Added check for QCA8337 switch ID and build up the register mask |
| 93 | + accordingly before writing the force mode bit to avoid overwriting the |
| 94 | + bit on switches other than QCA8337 for which there's no documentation |
| 95 | + on whether force mode is supported or not. |
| 96 | +- Added comment to state that regardless of port used (0 or 6), the |
| 97 | + force mode bit is written to the PORT0 PAD register as per vendor SDK. |
| 98 | +- Link to v1: https://lore.kernel.org/r/20260603-qca8337-force-mode-v1-1-caf7670ffab3@outlook.com |
| 99 | +--- |
| 100 | + drivers/net/dsa/qca/qca8k-8xxx.c | 22 ++++++++++++++++------ |
| 101 | + drivers/net/dsa/qca/qca8k.h | 1 + |
| 102 | + 2 files changed, 17 insertions(+), 6 deletions(-) |
| 103 | + |
| 104 | + |
| 105 | +--- |
| 106 | +base-commit: b7bee4ca5688e30ca50fbc87b1b8f7eed7006c17 |
| 107 | +change-id: 20260603-qca8337-force-mode-fbcba5296446 |
| 108 | + |
| 109 | +Best regards, |
21 | 110 |
|
22 | 111 | --- a/drivers/net/dsa/qca/qca8k-8xxx.c |
23 | 112 | +++ b/drivers/net/dsa/qca/qca8k-8xxx.c |
24 | | -@@ -1611,10 +1611,14 @@ static int qca8k_pcs_config(struct phyli |
| 113 | +@@ -1538,7 +1538,7 @@ static int qca8k_pcs_config(struct phyli |
| 114 | + { |
| 115 | + struct qca8k_priv *priv = pcs_to_qca8k_pcs(pcs)->priv; |
| 116 | + int cpu_port_index, ret, port; |
| 117 | +- u32 reg, val; |
| 118 | ++ u32 mask, reg, val; |
| 119 | + |
| 120 | + port = pcs_to_qca8k_pcs(pcs)->port; |
| 121 | + switch (port) { |
| 122 | +@@ -1611,11 +1611,21 @@ static int qca8k_pcs_config(struct phyli |
25 | 123 | if (priv->ports_config.sgmii_tx_clk_falling_edge) |
26 | 124 | val |= QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE; |
27 | 125 |
|
28 | | -+ if (neg_mode == PHYLINK_PCS_NEG_OUTBAND) |
29 | | -+ val |= QCA8K_PORT_PAD_SGMII_FORCE_MODE; |
30 | | -+ |
31 | | - if (val) |
32 | | - ret = qca8k_rmw(priv, reg, |
33 | | - QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE | |
| 126 | +- if (val) |
| 127 | +- ret = qca8k_rmw(priv, reg, |
| 128 | +- QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE | |
34 | 129 | - QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE, |
35 | | -+ QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE | |
36 | | -+ QCA8K_PORT_PAD_SGMII_FORCE_MODE, |
37 | | - val); |
| 130 | +- val); |
| 131 | ++ mask = (val) ? (QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE | |
| 132 | ++ QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE) : 0; |
| 133 | ++ |
| 134 | ++ /* |
| 135 | ++ * (Un)set force mode on QCA8337 only, don't include it in the mask for |
| 136 | ++ * others. It is written to the PORT0 PAD register for both port 0 and 6. |
| 137 | ++ */ |
| 138 | ++ if (priv->switch_id == QCA8K_ID_QCA8337) { |
| 139 | ++ if (neg_mode == PHYLINK_PCS_NEG_OUTBAND) |
| 140 | ++ val |= QCA8K_PORT_PAD_SGMII_FORCE_MODE; |
| 141 | ++ mask |= QCA8K_PORT_PAD_SGMII_FORCE_MODE; |
| 142 | ++ } |
| 143 | ++ |
| 144 | ++ if (mask) |
| 145 | ++ ret = qca8k_rmw(priv, reg, mask, val); |
38 | 146 |
|
39 | 147 | return 0; |
| 148 | + } |
40 | 149 | --- a/drivers/net/dsa/qca/qca8k.h |
41 | 150 | +++ b/drivers/net/dsa/qca/qca8k.h |
42 | 151 | @@ -58,6 +58,7 @@ |
|
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