bug fix for aarch64

lifting-bits · Sep 23, 2020 · 590c9b8 · 590c9b8
1 parent 7d0b4c7
commit 590c9b8
Showing 1 changed file with 14 additions and 21 deletions.
diff --git a/remill/Arch/AArch64/Arch.cpp b/remill/Arch/AArch64/Arch.cpp
@@ -845,11 +845,19 @@ static void AddPCDisp(Instruction &inst, int64_t disp) {
              Operand::Address::kAddressCalculation);
 }
 
-static void AddNextPC(Instruction &inst) {
+static void DecodeFallThroughPC(Instruction &inst) {
+  Operand not_taken_op = {};
+  not_taken_op.action = Operand::kActionRead;
+  not_taken_op.type = Operand::kTypeAddress;
+  not_taken_op.size = kPCWidth;
+  not_taken_op.addr.address_size = kPCWidth;
+  not_taken_op.addr.base_reg.name = "PC";
+  not_taken_op.addr.base_reg.size = kPCWidth;
+  not_taken_op.addr.displacement = kInstructionSize;
+  not_taken_op.addr.kind = Operand::Address::kControlFlowTarget;
+  inst.operands.push_back(not_taken_op);
 
-  // add +4 as the PC displacement
-  // emit an address computation operand
-  AddPCDisp(inst, kInstructionSize);
+  inst.branch_not_taken_pc = inst.next_pc;
 }
 
 // Base+offset memory operands are equivalent to indexing into an array.
@@ -1265,7 +1273,7 @@ bool TryDecodeRET_64R_BRANCH_REG(const InstData &data, Instruction &inst) {
 // BLR  <Xn>
 bool TryDecodeBLR_64_BRANCH_REG(const InstData &data, Instruction &inst) {
   AddRegOperand(inst, kActionRead, kRegX, kUseAsValue, data.Rn);
-  AddNextPC(inst);
+  DecodeFallThroughPC(inst);
   return true;
 }
 
@@ -1744,21 +1752,6 @@ bool TryDecodeB_ONLY_BRANCH_IMM(const InstData &data, Instruction &inst) {
   return true;
 }
 
-static void DecodeFallThroughPC(Instruction &inst) {
-  Operand not_taken_op = {};
-  not_taken_op.action = Operand::kActionRead;
-  not_taken_op.type = Operand::kTypeAddress;
-  not_taken_op.size = kPCWidth;
-  not_taken_op.addr.address_size = kPCWidth;
-  not_taken_op.addr.base_reg.name = "PC";
-  not_taken_op.addr.base_reg.size = kPCWidth;
-  not_taken_op.addr.displacement = kInstructionSize;
-  not_taken_op.addr.kind = Operand::Address::kControlFlowTarget;
-  inst.operands.push_back(not_taken_op);
-
-  inst.branch_not_taken_pc = inst.next_pc;
-}
-
 // Decode a relative branch target.
 static void DecodeConditionalBranch(Instruction &inst, int64_t disp) {
 
@@ -1848,7 +1841,7 @@ bool TryDecodeBL_ONLY_BRANCH_IMM(const InstData &data, Instruction &inst) {
                                                (data.imm26.simm26 << 2ULL));
   inst.branch_not_taken_pc = inst.next_pc;
   AddPCDisp(inst, data.imm26.simm26 << 2LL);
-  AddNextPC(inst);  // Decodes the return address.
+  DecodeFallThroughPC(inst); // Decodes the return address.
   return true;
 }