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From: Rouven Czerwinski <
[email protected] >
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Date: Fri, 18 Jun 2021 11:07:20 +0200
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- Subject: [PATCH] fdts: add lxa tac
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+ Subject: [PATCH] fdts: lxa-tac: add Linux Automation GmbH TAC
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+ MIME-Version: 1.0
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+ Content-Type: text/plain; charset=UTF-8
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+ Content-Transfer-Encoding: 8bit
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+
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+ The Linux Automation Test Automation Controller (LXA TAC)[1] is an embedded
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+ software development tool built around the Octavo Systems OSD32MP15x SiP.
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+
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+ The device contains an eMMC for storage, a DSA-capable on board ethernet
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+ switch with two external ports, dual CAN busses, a power switch to turn
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+ a device under test on or off and some other I/O.
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+
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+ As of now there are two STM32MP157 based hardware generations (Gen 1 and
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+ Gen 2) that have most of their hardware config in common.
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+ In the future there will also be a STM32MP153 based hardware generation.
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+
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+ [1]: https://www.linux-automation.com/en/products/lxa-tac.html
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Signed-off-by: Rouven Czerwinski <
[email protected] >
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+ Signed-off-by: Leonard Göhrs <
[email protected] >
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+ Signed-off-by: Jan Luebbe <
[email protected] >
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---
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- fdts/stm32mp157c-lxa-tac-fw-config.dts | 7 + ++
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- fdts/stm32mp157c-lxa-tac.dts | 81 + +++++++++++++++++++++++++++++++++
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- 2 files changed, 88 insertions(+)
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+ fdts/stm32mp157c-lxa-tac-fw-config.dts | 7 ++
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+ fdts/stm32mp157c-lxa-tac.dts | 134 +++++++++++++++++++++++++++++++++
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+ 2 files changed, 141 insertions(+)
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create mode 100644 fdts/stm32mp157c-lxa-tac-fw-config.dts
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create mode 100644 fdts/stm32mp157c-lxa-tac.dts
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@@ -25,10 +43,10 @@ index 000000000000..9ee09e93e9ea
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+ #include "stm32mp15-fw-config.dtsi"
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diff --git a/fdts/stm32mp157c-lxa-tac.dts b/fdts/stm32mp157c-lxa-tac.dts
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new file mode 100644
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- index 000000000000..c5f55cae1d2a
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+ index 000000000000..5988fded94da
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--- /dev/null
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+++ b/fdts/stm32mp157c-lxa-tac.dts
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- @@ -0,0 +1,81 @@
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+ @@ -0,0 +1,134 @@
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+ /* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */
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+ /*
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+ * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
@@ -110,3 +128,56 @@ index 000000000000..c5f55cae1d2a
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+ };
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+ };
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+ };
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+ +
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+ + /* VCO = 624 MHz => P = 208, Q = 48, R = 104 */
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+ + &pll3 {
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+ + cfg = <1 51 2 12 5 PQR(1,1,1)>;
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+ + /delete-property/ frac;
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+ + };
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+ +
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+ + /* VCO = 750.0 MHz => P = 125, Q = 75, R = 62.5 */
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+ + &pll4 {
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+ + cfg = <3 124 5 9 11 PQR(1,1,1)>;
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+ + /delete-property/ frac;
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+ + };
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+ +
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+ + &rcc {
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+ + /* change parent clocks */
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+ + st,pkcs = <
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+ + CLK_CKPER_HSE
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+ + CLK_FMC_ACLK
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+ + CLK_QSPI_ACLK
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+ + CLK_ETH_PLL4P
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+ + CLK_SDMMC12_PLL3R
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+ + CLK_DSI_DSIPLL
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+ + CLK_STGEN_HSE
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+ + CLK_USBPHY_HSE
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+ + CLK_SPI2S1_PLL3Q
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+ + CLK_SPI2S23_PLL3Q
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+ + CLK_SPI45_HSI
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+ + CLK_SPI6_HSI
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+ + CLK_I2C46_HSI
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+ + CLK_SDMMC3_DISABLED
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+ + CLK_USBO_USBPHY
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+ + CLK_ADC_CKPER
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+ + CLK_CEC_DISABLED
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+ + CLK_I2C12_HSI
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+ + CLK_I2C35_HSI
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+ + CLK_UART1_HSI
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+ + CLK_UART24_HSI
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+ + CLK_UART35_HSI
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+ + CLK_UART6_HSI
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+ + CLK_UART78_HSI
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+ + CLK_SPDIF_DISABLED
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+ + CLK_FDCAN_PLL3Q
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+ + CLK_SAI1_DISABLED
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+ + CLK_SAI2_DISABLED
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+ + CLK_SAI3_DISABLED
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+ + CLK_SAI4_DISABLED
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+ + CLK_RNG1_LSI
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+ + CLK_RNG2_LSI
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+ + CLK_LPTIM1_PCLK1
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+ + CLK_LPTIM23_PCLK3
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+ + CLK_LPTIM45_LSE
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+ + >;
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+ + };
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