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platforms/sqrl_acorn: Add automatic FTDI Chip detection, add OpenFPGALoader suppport (and switch to it by default), remove VivadoProgrammer support.
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litex_boards/platforms/sqrl_acorn.py

Lines changed: 25 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -11,9 +11,12 @@
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# The 101 variant is eguivalent to the LiteFury and 215 variant equivalent to the NiteFury from
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# RHSResearchLLC that are documented at: https://github.com/RHSResearchLLC/NiteFury-and-LiteFury.
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import subprocess
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from litex.build.generic_platform import *
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from litex.build.xilinx import Xilinx7SeriesPlatform, VivadoProgrammer
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from litex.build.openocd import OpenOCD
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from litex.build.xilinx import Xilinx7SeriesPlatform
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from litex.build.openocd import OpenOCD
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from litex.build.openfpgaloader import OpenFPGALoader
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# IOs ----------------------------------------------------------------------------------------------
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@@ -197,17 +200,26 @@ def __init__(self, variant="cle-215+", toolchain="vivado"):
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"write_cfgmem -force -format bin -interface spix4 -size 16 -loadbit \"up 0x0 {build_name}_fallback.bit\" -file {build_name}_fallback.bin"
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]
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def create_programmer(self, name='openocd'):
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proxy = {
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"cle-101": "bscan_spi_xc7a100t.bit",
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"cle-215": "bscan_spi_xc7a200t.bit",
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"cle-215+": "bscan_spi_xc7a200t.bit"
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}[self.variant]
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if name == 'openocd':
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return OpenOCD("openocd_xc7_ft232.cfg", proxy)
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elif name == 'vivado':
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# TODO: some board versions may have s25fl128s
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return VivadoProgrammer(flash_part='s25fl256sxxxxxx0-spi-x1_x2_x4')
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def detect_ftdi_chip(self):
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lsusb_log = subprocess.run(['lsusb'], capture_output=True, text=True)
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for ftdi_chip in ["ft232", "ft2232", "ft4232"]:
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if f"Future Technology Devices International, Ltd {ftdi_chip.upper()}" in lsusb_log.stdout:
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return ftdi_chip
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return None
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def create_programmer(self, name="openfpgaloader"):
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ftdi_chip = self.detect_ftdi_chip()
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if ftdi_chip is None:
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raise RuntimeError("No compatible FTDI device found.")
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device = {
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"cle-101": "xc7a100t",
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"cle-215": "xc7a200t",
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"cle-215+": "xc7a200t"
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}[self.variant]
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if name == "openfpgaloader":
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return OpenFPGALoader(cable=ftdi_chip, fpga_part="{device}fbg484", freq=10e6)
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elif name == "openocd":
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return OpenOCD(f"openocd_xc7_{ftdi_chip}.cfg", f"bscan_spi_{device}.bit")
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def do_finalize(self, fragment):
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Xilinx7SeriesPlatform.do_finalize(self, fragment)

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