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platforms: fix KCU116 QSPI flash resources
Fix the dual QSPI flash resource shape so cs_n and dq are exposed as subsignals, correct the second flash chip select/data pins from UG1239, and add spiflash4x aliases for both devices. Sources: - https://docs.amd.com/r/en-US/ug1239-kcu116-eval-bd - https://docs.amd.com/api/khub/documents/MyDbquCxOBksfDRrhBQM1A/content
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Lines changed: 14 additions & 5 deletions

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litex_boards/platforms/xilinx_kcu116.py

Lines changed: 14 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -92,14 +92,23 @@
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# SPIFlash
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("spiflash", 0, # clock needs to be accessed through primitive
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Subsignal("cs_n"), Pins("AA12"),
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Subsignal("dq"), Pins("AD11 AC12 AC11 AE11"),
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Subsignal("cs_n", Pins("AA12")),
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Subsignal("dq", Pins("AD11 AC12 AC11 AE11")),
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IOStandard("LVCMOS18")
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),
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("spiflash4x", 0, # clock needs to be accessed through primitive
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Subsignal("cs_n", Pins("AA12")),
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Subsignal("dq", Pins("AD11 AC12 AC11 AE11")),
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IOStandard("LVCMOS18")
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),
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("spiflash", 1, # clock needs to be accessed through primitive
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Subsignal("cs_n"), Pins("U22"),
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Subsignal("dq"), Pins("N23 P23 R20 R21"),
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Subsignal("cs_n", Pins("R20")),
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Subsignal("dq", Pins("N19 P23 N23 R21")),
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IOStandard("LVCMOS18")
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),
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("spiflash4x", 1, # clock needs to be accessed through primitive
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Subsignal("cs_n", Pins("R20")),
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Subsignal("dq", Pins("N19 P23 N23 R21")),
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IOStandard("LVCMOS18")
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),
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