warning: unable to access 'pythondata_cpu_cva6/system_verilog/corev_apu/fpga-support/synth/BramDwc/.gitignore': Too many levels of symbolic links
warning: unable to access 'pythondata_cpu_cva6/system_verilog/corev_apu/fpga-support/behav/BramDwc/.gitignore': Too many levels of symbolic links
