Closed
Description
All the below are missing:
CodeGen/CIRGenBuiltin.cpp: case Builtin::BI__atomic_thread_fence:
CodeGen/CIRGenBuiltin.cpp- case Builtin::BI__atomic_signal_fence:
CodeGen/CIRGenBuiltin.cpp: case Builtin::BI__c11_atomic_thread_fence:
CodeGen/CIRGenBuiltin.cpp- case Builtin::BI__c11_atomic_signal_fence:
CodeGen/CIRGenBuiltin.cpp: llvm_unreachable("BI__atomic_thread_fence like NYI");
Activity
__atomic_thread_fence
#725elhewaty commentedon Jan 9, 2025
I will give it a try, assign me please
bcardosolopes commentedon Jan 10, 2025
@elhewaty awesome, just did!
Rajveer100 commentedon Jan 11, 2025
@bcardosolopes
Could you provide some context here with respect to the implementations?
From my understanding, this is similar to adding an operation in MLIR dialect, and then referencing with the
cir::
namespace.bcardosolopes commentedon Jan 14, 2025
@Rajveer100 sure, we probably want a new cir::FenceOp that encodes (a) the sync scope somehow (perhaps a attribute enum kind that covers single_thread and system) and (b) the atomic ordering. If the atomic ordering isn't constant, we don't want to early expand it during CIRGen, but only during LLVM Lowering. Lowering to LLVM should also be implemented as part of the PR that fixes this.
[CIRGen] Task 1: Support for builtin `__atomic_thread_fence`
__atomic_thread_fence
#1287[CIRGen] Task 1: Support for builtin `__atomic_thread_fence`
[CIR][CIRGen] Support for builtin `__atomic_thread_fence`
[CIR][CIRGen] Support for builtin __atomic_thread_fence
[CIR][CIRGen] Support for builtin __atomic_thread_fence
[CIR][CIRGen] Support for builtin __atomic_thread_fence
[CIR][CIRGen] Support for builtin __atomic_thread_fence
[CIR][CIRGen] Support for builtin __atomic_thread_fence
[CIR][CIRGen] Support for builtin __atomic_thread_fence
[CIR][CIRGen] Support for builtin `__atomic_thread_fence` (llvm#1287)