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[otbn] Define SIMD instructions #18737

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[otbn] Define SIMD instructions

[otbn] Define SIMD instructions #18737

Triggered via pull request February 10, 2026 07:50
@etterlietterli
synchronize #29231
etterli:otbn-pqc-simd-insn
Status Cancelled
Total duration 32m 1s
Artifacts 4

ci.yml

on: pull_request
Lint (quick)
2m 46s
Lint (quick)
Earl Grey for CW340  /  Build bitstream
28m 59s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310 Hyperdebug  /  Build bitstream
28m 36s
Earl Grey for CW310 Hyperdebug / Build bitstream
Lint (slow)
13m 17s
Lint (slow)
Build documentation
4m 54s
Build documentation
Airgapped build
18m 45s
Airgapped build
Verible lint
1m 15s
Verible lint
Run OTBN smoke Test
2m 36s
Run OTBN smoke Test
Run OTBN crypto tests
27m 59s
Run OTBN crypto tests
Verilated English Breakfast
5m 45s
Verilated English Breakfast
Verilated Earl Grey
15m 36s
Verilated Earl Grey
CW305's Bitstream
26m 8s
CW305's Bitstream
Build Docker Containers
2m 9s
Build Docker Containers
Build and test software
23m 51s
Build and test software
Build and test Darjeeling software
18m 9s
Build and test Darjeeling software
QEMU smoketest
2m 16s
QEMU smoketest
Test QEMU local development override
4m 15s
Test QEMU local development override
CW340 Manufacturing Tests  /  FPGA test
CW340 Manufacturing Tests / FPGA test
CW340 ROM Tests  /  FPGA test
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
CW340 SiVal Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
CW340 Test ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
CW310 Manufacturing Tests  /  FPGA test
CW310 Manufacturing Tests / FPGA test
CW310 ROM Tests  /  FPGA test
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
CW310 SiVal Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
CW310 Test ROM Tests / FPGA test
Merge blocker
Merge blocker
Verify FPGA jobs
Verify FPGA jobs
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Annotations

11 errors and 1 warning
Verilated English Breakfast
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.
Earl Grey for CW310 Hyperdebug / Build bitstream
Canceling since a higher priority waiting request for CI-refs/pull/29231/merge exists
Earl Grey for CW310 Hyperdebug / Build bitstream
The operation was canceled.
Earl Grey for CW340 / Build bitstream
Canceling since a higher priority waiting request for CI-refs/pull/29231/merge exists
Earl Grey for CW340 / Build bitstream
The operation was canceled.
CI
Canceling since a higher priority waiting request for CI-refs/pull/29231/merge exists
CI
Canceling since a higher priority waiting request for CI-refs/pull/29231/merge exists
CI
Canceling since a higher priority waiting request for CI-refs/pull/29231/merge exists
Verilated English Breakfast
No files were found with the provided path: build-bin/hw/top_englishbreakfast/Vchip_englishbreakfast_verilator. No artifacts will be uploaded.

Artifacts

Produced during runtime
Name Size Digest
chip_englishbreakfast_cw305
1.49 MB
sha256:434ba39a792e9fd5bc6171a3898fa4029dafccaf9d71dc318b7095529aa4f6fc
docs
83.1 MB
sha256:43c0efb8af436ad1f98ee04cdf0dbb8cf25bffaff9c154f5b22a4c45828aee26
sw_build_test-test-results
248 KB
sha256:639a167d824f483d403abad43f4dacb03589693105aa7fad388d53ac64b4a94d
verilator_earlgrey-test-results
9.74 KB
sha256:612aa39e777ea143c777ab7dc1eed3d6ba02140de30faa3a3ed8792b64b68111