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[WIP][cov,ci] Collect test coverage on CI #18825

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[WIP][cov,ci] Collect test coverage on CI

[WIP][cov,ci] Collect test coverage on CI #18825

Triggered via pull request February 11, 2026 16:00
@sasdfsasdf
synchronize #29297
sasdf:mgTffdf510d
Status Cancelled
Total duration 58m 58s
Artifacts 27

ci.yml

on: pull_request
Earl Grey for CW340  /  Build bitstream
1m 55s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310 Hyperdebug  /  Build bitstream
2m 12s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW310  /  Build bitstream
2m 14s
Earl Grey for CW310 / Build bitstream
OTBN Crypto Tests Coverage
3m 52s
OTBN Crypto Tests Coverage
Unit Test Coverage
14m 46s
Unit Test Coverage
Lint (quick)
3m 22s
Lint (quick)
CW340 Test ROM Tests Coverage  /  FPGA test
1m 39s
CW340 Test ROM Tests Coverage / FPGA test
CW340 ROM Tests Coverage  /  FPGA test
1m 48s
CW340 ROM Tests Coverage / FPGA test
CW340 ROM_EXT Tests Coverage  /  FPGA test
12m 39s
CW340 ROM_EXT Tests Coverage / FPGA test
CW340 SiVal Tests Coverage  /  FPGA test
10m 37s
CW340 SiVal Tests Coverage / FPGA test
CW340 SiVal ROM_EXT Tests Coverage  /  FPGA test
21m 0s
CW340 SiVal ROM_EXT Tests Coverage / FPGA test
CW340 Manufacturing Tests Coverage  /  FPGA test
55m 32s
CW340 Manufacturing Tests Coverage / FPGA test
CW310 SiVal Tests Coverage  /  FPGA test
55m 36s
CW310 SiVal Tests Coverage / FPGA test
CW310 SiVal ROM_EXT Tests Coverage  /  FPGA test
54m 45s
CW310 SiVal ROM_EXT Tests Coverage / FPGA test
CW310 Manufacturing Tests Coverage  /  FPGA test
56m 26s
CW310 Manufacturing Tests Coverage / FPGA test
Hyper310 ROM_EXT Tests Coverage  /  FPGA test
54m 17s
Hyper310 ROM_EXT Tests Coverage / FPGA test
CW310 Test ROM Tests Coverage  /  FPGA test
19m 14s
CW310 Test ROM Tests Coverage / FPGA test
CW310 ROM Tests Coverage  /  FPGA test
55m 35s
CW310 ROM Tests Coverage / FPGA test
CW310 ROM_EXT Tests Coverage  /  FPGA test
32m 8s
CW310 ROM_EXT Tests Coverage / FPGA test
Cache bitstreams to GCP
Cache bitstreams to GCP
Publish Coverage Report
1m 1s
Publish Coverage Report
Lint (slow)
11m 40s
Lint (slow)
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52 errors and 22 warnings
Earl Grey for CW340 / Build bitstream
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
Earl Grey for CW310 Hyperdebug / Build bitstream
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
Earl Grey for CW310 / Build bitstream
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
Lint (quick)
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
CW340 Test ROM Tests Coverage / FPGA test
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
OTBN Crypto Tests Coverage
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
CW340 ROM Tests Coverage / FPGA test
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
CW340 SiVal Tests Coverage / FPGA test
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
CW340 ROM_EXT Tests Coverage / FPGA test
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc.ConfigBoundsTest/5: sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc#L1411
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc:1423 Expected equality of these values: error Which is: 256857859 param.expect Which is: 105862915
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc.ConfigBoundsTest/3: sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc#L1411
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc:1423 Expected equality of these values: error Which is: 256857859 param.expect Which is: 105862915
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc.FlashBoundsTest/9: sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc#L1370
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc:1374 Expected equality of these values: overlap Which is: 1849 p.overlap ? kHardenedBoolTrue : kHardenedBoolFalse Which is: 468
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc.FlashBoundsTest/7: sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc#L1370
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc:1374 Expected equality of these values: overlap Which is: 1849 p.overlap ? kHardenedBoolTrue : kHardenedBoolFalse Which is: 468
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc.FlashBoundsTest/6: sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc#L1370
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc:1374 Expected equality of these values: overlap Which is: 1849 p.overlap ? kHardenedBoolTrue : kHardenedBoolFalse Which is: 468
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc.FlashBoundsTest/5: sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc#L1370
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc:1375 Expected equality of these values: exclusive Which is: 1849 p.exclusive ? kHardenedBoolTrue : kHardenedBoolFalse Which is: 468
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc.FlashBoundsTest/4: sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc#L1370
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc:1375 Expected equality of these values: exclusive Which is: 1849 p.exclusive ? kHardenedBoolTrue : kHardenedBoolFalse Which is: 468
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc.BadFlashConfig/7: sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc#L1322
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc:1329 Expected equality of these values: error Which is: 256857859 expected Which is: 307189507
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc.BadFlashConfig/6: sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc#L1322
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc:1329 Expected equality of these values: error Which is: 256857859 expected Which is: 307189507
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc.BadFlashConfig/5: sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc#L1322
sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc:1329 Expected equality of these values: error Which is: 256857859 expected Which is: 273635075
Unit Test Coverage
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Publish Coverage Report
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
CW310 Test ROM Tests Coverage / FPGA test
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
CW340 SiVal ROM_EXT Tests Coverage / FPGA test
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
bash.sw/device/silicon_creator/rom/e2e/address_translation/rom_ext_b_flash_a_fpga_cw310_rom_ext.bash: bash#L1
exited with error code 142
bash.sw/device/silicon_creator/rom/e2e/address_translation/rom_ext_a_flash_b_fpga_cw310_rom_ext.bash: bash#L1
exited with error code 142
CW310 ROM_EXT Tests Coverage / FPGA test
Process completed with exit code 3.
CW310 ROM_EXT Tests Coverage / FPGA test
the remote end hung up unexpectedly
CW310 ROM_EXT Tests Coverage / FPGA test
could not read Username for 'https://github.com': terminal prompts disabled
Hyper310 ROM_EXT Tests Coverage / FPGA test
Canceling since a higher priority waiting request for Coverage-refs/pull/29297/merge exists
Hyper310 ROM_EXT Tests Coverage / FPGA test
The operation was canceled.
Hyper310 ROM_EXT Tests Coverage / FPGA test
could not read Username for 'https://github.com': terminal prompts disabled
CW310 SiVal ROM_EXT Tests Coverage / FPGA test
Canceling since a higher priority waiting request for Coverage-refs/pull/29297/merge exists
CW310 SiVal ROM_EXT Tests Coverage / FPGA test
The operation was canceled.
CW340 Manufacturing Tests Coverage / FPGA test
Canceling since a higher priority waiting request for Coverage-refs/pull/29297/merge exists
CW340 Manufacturing Tests Coverage / FPGA test
The operation was canceled.
CW310 SiVal Tests Coverage / FPGA test
Canceling since a higher priority waiting request for Coverage-refs/pull/29297/merge exists
CW310 SiVal Tests Coverage / FPGA test
The operation was canceled.
CW310 SiVal Tests Coverage / FPGA test
the remote end hung up unexpectedly
CW310 SiVal Tests Coverage / FPGA test
could not read Username for 'https://github.com': terminal prompts disabled
CW310 ROM Tests Coverage / FPGA test
Canceling since a higher priority waiting request for Coverage-refs/pull/29297/merge exists
CW310 ROM Tests Coverage / FPGA test
The operation was canceled.
CW310 Manufacturing Tests Coverage / FPGA test
Canceling since a higher priority waiting request for Coverage-refs/pull/29297/merge exists
CW310 Manufacturing Tests Coverage / FPGA test
The operation was canceled.
Coverage
Canceling since a higher priority waiting request for Coverage-refs/pull/29297/merge exists
Coverage
Canceling since a higher priority waiting request for Coverage-refs/pull/29297/merge exists
Coverage
Canceling since a higher priority waiting request for Coverage-refs/pull/29297/merge exists
Coverage
Canceling since a higher priority waiting request for Coverage-refs/pull/29297/merge exists
Coverage
Canceling since a higher priority waiting request for Coverage-refs/pull/29297/merge exists
Coverage
Canceling since a higher priority waiting request for Coverage-refs/pull/29297/merge exists
Coverage
Canceling since a higher priority waiting request for Coverage-refs/pull/29297/merge exists
Earl Grey for CW340 / Build bitstream
Failed to restore: Cache service responded with 400
Earl Grey for CW310 Hyperdebug / Build bitstream
Failed to restore: Cache service responded with 400
Earl Grey for CW310 / Build bitstream
Failed to restore: Cache service responded with 400
Lint (quick)
Failed to restore: Cache service responded with 400
CW340 Test ROM Tests Coverage / FPGA test
Failed to restore: Cache service responded with 400
OTBN Crypto Tests Coverage
Failed to restore: Cache service responded with 400
CW340 ROM Tests Coverage / FPGA test
Failed to restore: Cache service responded with 400
CW340 SiVal Tests Coverage / FPGA test
Failed to restore: Cache service responded with 400
CW340 ROM_EXT Tests Coverage / FPGA test
Failed to restore: Cache service responded with 400
Unit Test Coverage
Failed to restore: Cache service responded with 400
Lint (slow)
Failed to save: <h2>Our services aren't available right now</h2><p>We're working to restore all services as soon as possible. Please check back soon.</p>0GKuMaQAAAAAmVHcwh4CzTZoEgZ+rPA0ZQ0hHRURHRTE4MTgARWRnZQ==
Lint (slow)
Failed to restore: Cache service responded with 400
Publish Coverage Report
Failed to restore: Cache service responded with 400
CW310 Test ROM Tests Coverage / FPGA test
Failed to restore: Cache service responded with 400
CW340 SiVal ROM_EXT Tests Coverage / FPGA test
Failed to restore: Cache service responded with 400
CW310 ROM_EXT Tests Coverage / FPGA test
Failed to restore: Cache service responded with 400
Hyper310 ROM_EXT Tests Coverage / FPGA test
Failed to restore: Cache service responded with 400
CW310 SiVal ROM_EXT Tests Coverage / FPGA test
Failed to restore: Cache service responded with 400
CW340 Manufacturing Tests Coverage / FPGA test
Failed to restore: Cache service responded with 400
CW310 SiVal Tests Coverage / FPGA test
Failed to restore: Cache service responded with 400
CW310 ROM Tests Coverage / FPGA test
Failed to restore: Cache service responded with 400
CW310 Manufacturing Tests Coverage / FPGA test
Failed to restore: Cache service responded with 400

Artifacts

Produced during runtime
Name Size Digest
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