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[rv_core_ibex/rtl] Split data and ECC of the register file #18828

[rv_core_ibex/rtl] Split data and ECC of the register file

[rv_core_ibex/rtl] Split data and ECC of the register file #18828

CW340 SiVal Tests  /  FPGA test

succeeded Feb 11, 2026 in 58m 56s