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Add support for MLDSA in hsmtool #18831

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Add support for MLDSA in hsmtool

Add support for MLDSA in hsmtool #18831

Re-run triggered February 11, 2026 17:17
@timothytrippeltimothytrippel
#29202
willyzha:mldsa-hsmtool-rebased
Status Queued
Total duration –
Artifacts 6

ci.yml

on: pull_request
Lint (quick)
3m 0s
Lint (quick)
Earl Grey for CW310 Hyperdebug  /  Build bitstream
39m 29s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
56m 38s
Earl Grey for CW340 / Build bitstream
Lint (slow)
13m 43s
Lint (slow)
Build documentation
5m 11s
Build documentation
Airgapped build
18m 8s
Airgapped build
Verible lint
1m 5s
Verible lint
Run OTBN smoke Test
2m 36s
Run OTBN smoke Test
Run OTBN crypto tests
6m 3s
Run OTBN crypto tests
Verilated English Breakfast
5m 39s
Verilated English Breakfast
Verilated Earl Grey
1h 19m
Verilated Earl Grey
CW305's Bitstream
23m 42s
CW305's Bitstream
Build Docker Containers
2m 17s
Build Docker Containers
Build and test software
21m 8s
Build and test software
Build and test Darjeeling software
17m 41s
Build and test Darjeeling software
QEMU smoketest
2m 30s
QEMU smoketest
Test QEMU local development override
4m 37s
Test QEMU local development override
CW310 Test ROM Tests  /  FPGA test
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
CW310 Manufacturing Tests / FPGA test
Cache bitstreams to GCP
4s
Cache bitstreams to GCP
CW340 Test ROM Tests  /  FPGA test
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
CW340 Manufacturing Tests / FPGA test
Merge blocker
4s
Merge blocker
Verify FPGA jobs
Verify FPGA jobs
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4 errors and 1 warning
Verilated English Breakfast
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.
Verilated English Breakfast
No files were found with the provided path: build-bin/hw/top_englishbreakfast/Vchip_englishbreakfast_verilator. No artifacts will be uploaded.

Artifacts

Produced during runtime
Name Size Digest
chip_englishbreakfast_cw305
1.49 MB
sha256:c7d628ccc159e131874555d752c6220c512aaea6b634ee71834bd37ec0d3d1c8
docs
83.2 MB
sha256:97702db1b4ddb314e2ec7740500b2bbad32fd4c386039a026eacf18c69d91663
partial-build-bin-chip_earlgrey_cw310_hyperdebug
5.85 MB
sha256:d9556dfc6cb09e2de48bd3b9a54e0a1755e2adff7a8bef665aba867017fa9111
partial-build-bin-chip_earlgrey_cw340
10 MB
sha256:e79772420de2097e451daf69838261bddc3e29e2d4c9d8b0d2ec3bef6b73af78
sw_build_test-test-results
246 KB
sha256:7bad5cbeb2dd1eb42e477bf2198e6b2afd5f31d2c92b31a137cbd1dfd7f68620
verilator_earlgrey-test-results
9.54 KB
sha256:a81a91fbe5d67c804143a721691b01c4d1342dd2a2dca2051975ad1d722d3ff7