[ottf] Enable alert catching by default in OTTF

jwnrt · jwnrt · commit d4540e341a74 · 2026-02-04T23:03:18.000Z
Alert 37 is skipped on FPGA ROM_EXT execution environments until we can splice provisioning data into flash. Signed-off-by: James Wainwright <james.wainwright@lowrisc.org> (cherry picked from commit 48ec170)
diff --git a/sw/device/lib/testing/test_framework/ottf_alerts.c b/sw/device/lib/testing/test_framework/ottf_alerts.c
@@ -111,7 +111,7 @@ status_t ottf_alerts_ignore_alert(dif_alert_handler_alert_t alert) {
 
 bool ottf_alerts_should_handle_irq(dt_instance_id_t devid,
                                    dif_rv_plic_irq_id_t plic_irq_id) {
-  return kOttfTestConfig.catch_alerts &&
+  return !kOttfTestConfig.ignore_alerts &&
          devid == dt_alert_handler_instance_id(kDtAlertHandler) &&
          plic_irq_id == dt_alert_handler_irq_to_plic_id(
                             kDtAlertHandler, kDtAlertHandlerIrqClassd);
diff --git a/sw/device/lib/testing/test_framework/ottf_main.c b/sw/device/lib/testing/test_framework/ottf_main.c
@@ -177,7 +177,7 @@ void _ottf_main(void) {
   }
 
 #if OPENTITAN_HAS_ALERT_HANDLER
-  if (kOttfTestConfig.catch_alerts) {
+  if (!kOttfTestConfig.ignore_alerts) {
     if (!kOttfTestConfig.silence_console_prints) {
       LOG_INFO("Enabling OTTF alert catcher");
     }
diff --git a/sw/device/lib/testing/test_framework/ottf_test_config.h b/sw/device/lib/testing/test_framework/ottf_test_config.h
@@ -136,7 +136,7 @@ typedef struct ottf_test_config {
    * The alert handler configuration is not locked and can be modified further
    * by the test.
    */
-  bool catch_alerts;
+  bool ignore_alerts;
 } ottf_test_config_t;
 
 /**
diff --git a/sw/device/silicon_creator/lib/otbn_boot_services_functest.c b/sw/device/silicon_creator/lib/otbn_boot_services_functest.c
@@ -17,7 +17,7 @@
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"  // Generated.
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 // Keymgr handle for this test.
 static dif_keymgr_t keymgr;
diff --git a/sw/device/silicon_creator/rom/e2e/chip_specific_startup/chip_specific_startup.c b/sw/device/silicon_creator/rom/e2e/chip_specific_startup/chip_specific_startup.c
@@ -27,7 +27,7 @@
 #include "hw/top/sensor_ctrl_regs.h"
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 
-OTTF_DEFINE_TEST_CONFIG();
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
 
 enum {
   kAstInitEnOffset = OTP_CTRL_PARAM_CREATOR_SW_CFG_AST_INIT_EN_OFFSET -
diff --git a/sw/device/silicon_creator/rom/e2e/rstmgr/alert_info_test.c b/sw/device/silicon_creator/rom/e2e/rstmgr/alert_info_test.c
@@ -14,7 +14,7 @@
 #include "hw/top/uart_regs.h"
 
 // Test handles alerts directly, disable OTTF catcher.
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = false);
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
 
 static const dt_uart_t kUartDt = kDtUart0;
 
diff --git a/sw/device/silicon_creator/rom/e2e/shutdown_alert/rom_e2e_alert_config_test.c b/sw/device/silicon_creator/rom/e2e/shutdown_alert/rom_e2e_alert_config_test.c
@@ -10,7 +10,7 @@
 
 #include "hw/top/otp_ctrl_regs.h"
 
-OTTF_DEFINE_TEST_CONFIG();
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
 
 /**
  * Check that the alert_handler register CRC32 matches OTP value.
diff --git a/sw/device/silicon_creator/rom/e2e/shutdown_alert/rom_e2e_shutdown_alert_config_test.c b/sw/device/silicon_creator/rom/e2e/shutdown_alert/rom_e2e_shutdown_alert_config_test.c
@@ -13,7 +13,7 @@
 #include "hw/top/uart_regs.h"
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 
-OTTF_DEFINE_TEST_CONFIG();
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
 
 enum {
   /**
diff --git a/sw/device/silicon_creator/rom_ext/e2e/attestation/print_certs.c b/sw/device/silicon_creator/rom_ext/e2e/attestation/print_certs.c
@@ -9,7 +9,7 @@
 #include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
 #include "sw/device/silicon_creator/manuf/base/perso_tlv_data.h"
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 const char kBase64[] =
     "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/";
diff --git a/sw/device/tests/aes_masking_off_test.c b/sw/device/tests/aes_masking_off_test.c
@@ -43,7 +43,7 @@ static dt_edn_t kTestEdn = (dt_edn_t)0;
 dif_edn_t edn;
 dif_csrng_t csrng;
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 status_t execute_test(const dif_csrng_t *csrng, const dif_edn_t *edn0) {
   // Perform the known-answer testing on the CSRNG SW application interface.
diff --git a/sw/device/tests/ast_clk_outs_test.c b/sw/device/tests/ast_clk_outs_test.c
@@ -13,7 +13,7 @@
 #include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 /**
  * AST CLK OUTPUTS TEST
diff --git a/sw/device/tests/chip_power_sleep_load_test.c b/sw/device/tests/chip_power_sleep_load_test.c
@@ -64,7 +64,7 @@ static volatile const bool kDeepSleep = false;
 
 static const uint32_t kPlicTarget = kTopEarlgreyPlicTargetIbex0;
 
-OTTF_DEFINE_TEST_CONFIG();
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
 
 void ottf_external_isr(uint32_t *exc_info) {
   LOG_INFO("got external IRQ");
diff --git a/sw/device/tests/clkmgr_reset_frequency_test.c b/sw/device/tests/clkmgr_reset_frequency_test.c
@@ -15,7 +15,7 @@
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 /**
  * This test measure clock counts with clkmgr frequency measurements, performing
diff --git a/sw/device/tests/edn_boot_mode.c b/sw/device/tests/edn_boot_mode.c
@@ -51,7 +51,7 @@ dif_entropy_src_config_t entropy_src_config = {
     .alert_threshold = 2,
 };
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 // Initializes the peripherals used in this test.
 static void init_peripherals(void) {
diff --git a/sw/device/tests/edn_kat.c b/sw/device/tests/edn_kat.c
@@ -111,7 +111,7 @@ const dif_edn_seed_material_t kEdnAlertTestSeedMaterialReseed = {
              0x73040c38, 0x6596739e},
 };
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 // Initializes the peripherals used in this test.
 static void init_peripherals(void) {
diff --git a/sw/device/tests/entropy_src_bypass_mode_health_test.c b/sw/device/tests/entropy_src_bypass_mode_health_test.c
@@ -36,7 +36,7 @@
 
 #define TIMEOUT (1000 * 1000)
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 // Module handles
 static dif_entropy_src_t entropy_src;
diff --git a/sw/device/tests/entropy_src_edn_reqs_test.c b/sw/device/tests/entropy_src_edn_reqs_test.c
@@ -58,7 +58,7 @@ enum {
   kFpgaLoop = 5,
 };
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 /**
  * Trigger an reseed operation.
diff --git a/sw/device/tests/flash_ctrl_info_access_lc.c b/sw/device/tests/flash_ctrl_info_access_lc.c
@@ -20,7 +20,7 @@
 
 #include "hw/top/lc_ctrl_regs.h"
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 static dif_lc_ctrl_t lc_ctrl;
 static dif_rv_plic_t plic0;
diff --git a/sw/device/tests/flash_ctrl_mem_protection_test.c b/sw/device/tests/flash_ctrl_mem_protection_test.c
@@ -37,7 +37,7 @@
  * Test programs Region 7, 3 and 0 in order and checks
  * write and read back based on each region's attribute.
  */
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 static dif_flash_ctrl_state_t flash;
 static const dt_flash_ctrl_t kFlashCtrlDt = (dt_flash_ctrl_t)0;
diff --git a/sw/device/tests/flash_ctrl_test.c b/sw/device/tests/flash_ctrl_test.c
@@ -289,7 +289,7 @@ static void test_memory_protection(void) {
   }
 }
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 bool test_main(void) {
   flash_info = dif_flash_ctrl_get_device_info();
diff --git a/sw/device/tests/keymgr_derive_cdi_test.c b/sw/device/tests/keymgr_derive_cdi_test.c
@@ -73,7 +73,7 @@ static const otbn_addr_t kOtbnVarEncU =
 static const otbn_addr_t kOtbnVarEncResult =
     OTBN_ADDR_T_INIT(x25519_sideload, enc_result);
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 /**
  * Initialize the dif handles required for this test.
diff --git a/sw/device/tests/keymgr_sideload_otbn_test.c b/sw/device/tests/keymgr_sideload_otbn_test.c
@@ -39,7 +39,7 @@ static const otbn_addr_t kOtbnVarEncU =
 static const otbn_addr_t kOtbnVarEncResult =
     OTBN_ADDR_T_INIT(x25519_sideload, enc_result);
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 /**
  * Initializes all DIF handles for each peripheral used in this test.
diff --git a/sw/device/tests/kmac_error_conditions_test.c b/sw/device/tests/kmac_error_conditions_test.c
@@ -23,7 +23,7 @@ static dif_keymgr_t keymgr;
 
 static const dt_kmac_t kKmacDt = (dt_kmac_t)0;
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 /**
  * KMAC test description.
diff --git a/sw/device/tests/otbn_irq_test.c b/sw/device/tests/otbn_irq_test.c
@@ -19,7 +19,7 @@ OTBN_DECLARE_APP_SYMBOLS(err_test);
 static const otbn_app_t kAppErrTest = OTBN_APP_T_INIT(err_test);
 static const uint32_t kPlicTarget = 0;
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 static dif_rv_plic_t plic;
 static dif_otbn_t otbn;
diff --git a/sw/device/tests/otbn_mem_scramble_test.c b/sw/device/tests/otbn_mem_scramble_test.c
@@ -20,7 +20,7 @@ static_assert(kDtRvCoreIbexCount >= 1,
 static dt_otbn_t kTestOtbn = (dt_otbn_t)0;
 static dt_rv_core_ibex_t kTestRvCoreIbex = (dt_rv_core_ibex_t)0;
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 typedef dif_result_t (*otbn_read_t)(const dif_otbn_t *otbn,
                                     uint32_t offset_bytes, void *dest,
diff --git a/sw/device/tests/otbn_smoketest.c b/sw/device/tests/otbn_smoketest.c
@@ -35,7 +35,7 @@ static_assert(kDtOtbnCount >= 1,
 
 static dt_otbn_t kTestOtbn = (dt_otbn_t)0;
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 /**
  * Gets the OTBN instruction count, checks that it matches expectations.
diff --git a/sw/device/tests/ottf_alert_catch_test.c b/sw/device/tests/ottf_alert_catch_test.c
@@ -19,7 +19,7 @@
 // The test is considered passing if we abort with `Alert 3 is asserted` and
 // failing if the test ends naturally.
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 enum {
   kAlertTimeoutMicros = 1000,
diff --git a/sw/device/tests/pwrmgr_deep_sleep_all_wake_ups.c b/sw/device/tests/pwrmgr_deep_sleep_all_wake_ups.c
@@ -21,7 +21,7 @@
 // Test handles its own alerts.
 // `sensor_ctrl_aon_recov_alert` fires immediately on wake-up which doesn't
 // give us enough time to disable it specifically.
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = false);
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
 
 /**
  * Clean up pwrmgr wakeup reason register for the next round.
diff --git a/sw/device/tests/pwrmgr_normal_sleep_all_wake_ups.c b/sw/device/tests/pwrmgr_normal_sleep_all_wake_ups.c
@@ -19,7 +19,7 @@
 // Test handles its own alerts.
 // `sensor_ctrl_aon_recov_alert` fires immediately on wake-up which doesn't
 // give us enough time to disable it specifically.
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = false);
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
 
 bool test_main(void) {
   // Enable global and external IRQ at Ibex.
diff --git a/sw/device/tests/pwrmgr_random_sleep_all_wake_ups.c b/sw/device/tests/pwrmgr_random_sleep_all_wake_ups.c
@@ -26,7 +26,7 @@
 // Test handles its own alerts.
 // `sensor_ctrl_aon_recov_alert` fires immediately on wake-up which doesn't
 // give us enough time to disable it specifically.
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = false);
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
 
 /**
  * Clean up pwrmgr wakeup reason register for the next round.
diff --git a/sw/device/tests/sensor_ctrl_wakeup_test.c b/sw/device/tests/sensor_ctrl_wakeup_test.c
@@ -19,7 +19,7 @@
 // Test handles its own alerts.
 // `sensor_ctrl_aon_recov_alert` fires immediately on wake-up which doesn't
 // give us enough time to disable it specifically.
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = false);
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
 
 static const dt_pwrmgr_t kPwrmgrDt = 0;
 static_assert(kDtPwrmgrCount == 1, "this test expects a pwrmgr");
diff --git a/sw/device/tests/sram_ctrl_scrambled_access_test.c b/sw/device/tests/sram_ctrl_scrambled_access_test.c
@@ -25,7 +25,7 @@
 #include "hw/top/rstmgr_regs.h"     // Generated.
 #include "hw/top/sram_ctrl_regs.h"  // Generated.
 
-OTTF_DEFINE_TEST_CONFIG(.catch_alerts = true);
+OTTF_DEFINE_TEST_CONFIG();
 
 enum {
 /**

Original file line number	Diff line number	Diff line change
`@@ -177,7 +177,7 @@ void _ottf_main(void) {`
`177`	`177`	`}`
`178`	`178`
`179`	`179`	`#if OPENTITAN_HAS_ALERT_HANDLER`
`180`		`- if (kOttfTestConfig.catch_alerts) {`
	`180`	`+ if (!kOttfTestConfig.ignore_alerts) {`
`181`	`181`	`if (!kOttfTestConfig.silence_console_prints) {`
`182`	`182`	`LOG_INFO("Enabling OTTF alert catcher");`
`183`	`183`	`}`