|
9 | 9 |
|
10 | 10 | #define SOC_GPIO_PIN_GNSS_TEC_PPS _PINNUM(0, 23) // P0.23 |
11 | 11 | #define SOC_GPIO_PIN_GNSS_TEC_WKE _PINNUM(0, 25) // P0.25 |
12 | | -#define SOC_GPIO_PIN_GNSS_TEC_PWR _PINNUM(1, 15) // P1.15 active LOW ? |
| 12 | +#define SOC_GPIO_PIN_GNSS_TEC_PWR _PINNUM(1, 15) // P1.15 active LOW |
13 | 13 | #define SOC_GPIO_PIN_GNSS_TEC_SW _PINNUM(0, 29) // P0.29 active HIGH ? |
14 | 14 |
|
15 | 15 | /* SPI */ |
|
18 | 18 | #define SOC_GPIO_PIN_TEC_SCK _PINNUM(0, 13) // P0.13 |
19 | 19 | #define SOC_GPIO_PIN_TEC_SS _PINNUM(0, 11) // P0.11 |
20 | 20 |
|
21 | | -/* SX1262 (AcSiP S68F) */ |
| 21 | +/* SX1262 (AcSiP S62F) */ |
22 | 22 | #define SOC_GPIO_PIN_TEC_RST _PINNUM(0, 7) // P0.07 |
23 | 23 | #define SOC_GPIO_PIN_TEC_DIO1 _PINNUM(1, 8) // P1.08 |
24 | 24 | #define SOC_GPIO_PIN_TEC_DIO2 _PINNUM(0, 5) // P0.05 |
|
40 | 40 | #define SOC_GPIO_PIN_TEC_BUTTON _PINNUM(1, 10) // P1.10 active LOW |
41 | 41 | #define SOC_GPIO_PIN_TEC_BOOT _PINNUM(0, 24) // P0.24 active LOW |
42 | 42 |
|
| 43 | +/* LED */ |
| 44 | +#define SOC_GPIO_LED_TEC_LED _PINNUM(1, 14) // P1.14 |
| 45 | + |
43 | 46 | /* NeoPixels */ |
44 | 47 | #define SOC_GPIO_LED_TEC_LED1 _PINNUM(0, 28) // P0.28 |
45 | 48 | #define SOC_GPIO_LED_TEC_LED2 _PINNUM(1, 7) // P1.07 |
|
84 | 87 | } |
85 | 88 | #endif /* ZD25WQ32C */ |
86 | 89 |
|
| 90 | +#if !defined(ZD25Q32D) |
| 91 | +// Settings for the Zetta Device ZD25Q32D 4MiB SPI flash. |
| 92 | +#define ZD25Q32D \ |
| 93 | + { \ |
| 94 | + .total_size = (1UL << 22), /* 4 MiB */ \ |
| 95 | + .start_up_time_us = 12000, .manufacturer_id = 0xba, \ |
| 96 | + .memory_type = 0x40, .capacity = 0x16, .max_clock_speed_mhz = 133, \ |
| 97 | + .quad_enable_bit_mask = 0x02, .has_sector_protection = false, \ |
| 98 | + .supports_fast_read = true, .supports_qspi = true, \ |
| 99 | + .supports_qspi_writes = true, .write_status_register_split = true, \ |
| 100 | + .single_status_byte = false, .is_fram = false, \ |
| 101 | + } |
| 102 | +#endif /* ZD25Q32D */ |
| 103 | + |
87 | 104 | /* ADC */ |
88 | 105 | #define SOC_GPIO_PIN_TEC_BATTERY _PINNUM(0, 2) // P0.02 100K-!00K |
89 | 106 | #define SOC_GPIO_PIN_TEC_VBAT_EN _PINNUM(0, 31) // P0.31 active HIGH |
0 commit comments