Support for inspecting in Verilog or VHDL.

[joshgalvan]

I only know Verilog well enough to comment on it, but I know VHDL would benefit from this, too.

In Verilog numbers written default to decimal, but if prepended by 'b or 'h the number is binary or hexadecimal, respectively. 'd also works if you want to explicitly write a decimal value.

The normal way someone would write a number in Verilog is: som_var = 8'hFF.
This means the following number is 8 bits wide and is represented in hexadecimal.

[joshgalvan]

Adding other scenarios of numbers written in Verilog:

4'b1001;
32'h1234ABCD;
2'd4;
'b1101011; (You don't have to specify the bit-width of the number)

You can of course write plain numbers, which default to decimal.