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Chapter 8: Binary Addition and Subtraction

Originally created 19 February 2021, by Maxwell Hauser — Updated 6 October 2025.

Builds upon material from Chapter 7: Unsigned, Signed Magnitude and Signed Two's Complement Binary Numbers.

Overview

Binary addition and subtraction are fundamental operations in digital systems. This chapter covers the addition of signed numbers using two's complement representation, which is the most common method for representing signed integers in computers.

Binary Addition Using Signed Two's Complement

The following examples show the results of the addition of two signed numbers.

Example 1: $(+3){10} + (+4){10}$

Represent both numbers in binary. The most significant bit represents the sign, and the result is positive:

  0011
+ 0100
------
  0111 = +7

Example 2: $(+3){10} + (-4){10}$

$(-4)_{10}$ in signed two's complement is $1100$, then:

  0011
+ 1100
------
  1111

The result does not generate a carry. Take the two's complement of the result: $-1$.

Example 3: $(-3){10} + (+5){10}$

  1101
+ 0101
------
1 0010

Discard the carry, and the result is $+2$.

Example 4: $(-7){10} + (-5){10}$

Represent both numbers in 4-bit signed two's complement:

  • $(-7)_{10} = 1001$
  • $(-5)_{10} = 1011$
  1001
+ 1011
------
 10100

The addition of two negative numbers results in a positive value, which is called overflow.

Example 5: $(+7){10} + (+6){10}$

  0111
+ 0110
------
  1101

The addition of two positive numbers results in a negative value, which is also called overflow.

Addition with 8-Bit Signed Two's Complement

Example 6: $(-38){10} + (+44){10}$ $(-38)_{10}$ in signed two's complement = $11011010$

$( + 44 )_{10}$ = $00101100$

  11011010
+ 00101100
----------
1 00000110

Discard the carry, and the result is $00000110 = +6$.

Example 7: $(-38){10} + (-44){10}$

$-38 = 11011010$

$-44 = 11010100$

  11011010
+ 11010100
----------
  10101110 = -82

Example 8: $(+100){10} + (+44){10}$

  01100100
+ 00101100
----------
  10011000

Two positive numbers are added and the result is negative. This is overflow, and the result is not correct.

Addition Overflow

The following cases result in overflow when adding two signed numbers:

  1. Both numbers are negative and the result becomes positive:

    • $(-A) + (-B) = +C$

  2. Both numbers are positive and the result becomes negative:

    • $(+A) + (+B) = -C$

Example 9: $(+38){10} + (+44){10}$ using 8-bit signed two's complement

$(+38)_{10}$ in signed two's complement = $00100110$

$(+44)_{10}$ = $00101100$

  00100110
+ 00101100
----------
  01010010 = +82

$(+38) + (+44) = (+82)$ — Correct result, no overflow.

(+100)10 + (+44)10

(+100)10 in signed two’s complement = 01100100 ( + 44 )10 + 00101100
---------------- 10011000 = -104 overflow and incorrect result. when this happens the result is not correct.

                                                   When adding two signed numbers, overflow occurs if the carry into the sign bit differs from the carry out of the sign bit.

In the case of (+100)10 + (+44)10, the carry into the sign bit is 1, and the carry out of the sign bit is 0, indicating an overflow condition. Thus, the result is incorrect. In order to avoid overflow, the result must be represented using more bits. One additional bit is needed to represent the result of (+100)10 + (+44)10 correctly. For example, using 9 bits instead of 8 bits:

(+100)10 in signed two’s complement = 001100100 ( + 44 )10 + 000101100
---------------- 010010000 = 144 correct result no overflow