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almir-okatoalmir-okato
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espressif: ESP32-C5 initial support
Signed-off-by: Almir Okato <almir.okato@espressif.com>
1 parent 6180b3c commit 9096d66

13 files changed

Lines changed: 515 additions & 10 deletions

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‎boot/espressif/CMakeLists.txt‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,7 @@ if("${MCUBOOT_TARGET}" STREQUAL "esp32" OR
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set(MCUBOOT_ARCH "xtensa")
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elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c2" OR
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"${MCUBOOT_TARGET}" STREQUAL "esp32c3" OR
39+
"${MCUBOOT_TARGET}" STREQUAL "esp32c5" OR
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"${MCUBOOT_TARGET}" STREQUAL "esp32c6" OR
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"${MCUBOOT_TARGET}" STREQUAL "esp32h2")
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set(MCUBOOT_ARCH "riscv")
@@ -100,11 +101,13 @@ elseif("${MCUBOOT_TARGET}" STREQUAL "esp32s2")
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set(ESP_MIN_REVISION 0)
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elseif("${MCUBOOT_TARGET}" STREQUAL "esp32s3")
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set(ESP_MIN_REVISION 0)
104+
elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c2")
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set(ESP_MIN_REVISION 0)
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elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c3")
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set(ESP_MIN_REVISION 3)
105-
elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c6")
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elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c5")
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set(ESP_MIN_REVISION 0)
107-
elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c2")
110+
elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c6")
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set(ESP_MIN_REVISION 0)
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elseif("${MCUBOOT_TARGET}" STREQUAL "esp32h2")
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set(ESP_MIN_REVISION 0)
@@ -429,6 +432,7 @@ if(NOT DEFINED ESP_FLASH_FREQ)
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"${MCUBOOT_TARGET}" STREQUAL "esp32s2" OR
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"${MCUBOOT_TARGET}" STREQUAL "esp32s3" OR
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"${MCUBOOT_TARGET}" STREQUAL "esp32c3" OR
435+
"${MCUBOOT_TARGET}" STREQUAL "esp32c5" OR
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"${MCUBOOT_TARGET}" STREQUAL "esp32c6")
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set(ESP_FLASH_FREQ "40m")
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elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c2")

‎boot/espressif/ci_configs/esp32c5-secureboot.conf‎

Lines changed: 11 additions & 0 deletions
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@@ -0,0 +1,11 @@
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# SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
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#
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# SPDX-License-Identifier: Apache-2.0
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# ATTENTION:
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# This configuration file targets the building for CI environment and contains
7+
# a set of definitions to resemble a bootloader image for RELEASE environment.
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# Running the generated firmware image may result in irreversible operations
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# to the chip!
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CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1

‎boot/espressif/hal/include/esp32c5/esp32c5.cmake‎

Lines changed: 35 additions & 0 deletions
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@@ -0,0 +1,35 @@
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# SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
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#
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# SPDX-License-Identifier: Apache-2.0
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list(APPEND include_dirs
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${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/private_include
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)
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list(APPEND hal_srcs
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${esp_hal_dir}/components/hal/cache_hal.c
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${esp_hal_dir}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c
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${esp_hal_dir}/components/esp_rom/patches/esp_rom_hp_regi2c_${MCUBOOT_TARGET}.c
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${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/pmu_param.c
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)
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if (DEFINED CONFIG_ESP_CONSOLE_UART_CUSTOM)
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list(APPEND hal_srcs
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${src_dir}/${MCUBOOT_TARGET}/console_uart_custom.c
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)
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endif()
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list(APPEND LINKER_SCRIPTS
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-T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.libc.ld
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-T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib.ld
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-T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.version.ld
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)
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set_source_files_properties(
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${esp_hal_dir}/components/bootloader_support/src/esp_image_format.c
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${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
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${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${MCUBOOT_TARGET}.c
32+
${esp_hal_dir}/components/hal/mmu_hal.c
33+
${esp_hal_dir}/components/hal/cache_hal.c
34+
PROPERTIES COMPILE_FLAGS
35+
"-Wno-logical-op")

‎boot/espressif/hal/include/esp32c5/sdkconfig.h‎

Lines changed: 38 additions & 0 deletions
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@@ -0,0 +1,38 @@
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/*
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* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
3+
*
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* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#define BOOTLOADER_BUILD 1
8+
#define NON_OS_BUILD 1
9+
#define CONFIG_LIBC_PICOLIBC 1
10+
#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0017
11+
#define CONFIG_IDF_TARGET "esp32c5"
12+
#define CONFIG_IDF_TARGET_ESP32C5 1
13+
#define CONFIG_ESP32C5_REV_MIN_0 1
14+
#define CONFIG_ESP32C5_REV_MIN_FULL 0
15+
#define CONFIG_ESP_REV_MIN_FULL CONFIG_ESP32C5_REV_MIN_FULL
16+
#define CONFIG_ESP32C5_REV_MIN 0
17+
#define CONFIG_ESP32C5_REV_MAX_FULL 99
18+
#define CONFIG_ESP_REV_MAX_FULL CONFIG_ESP32C5_REV_MAX_FULL
19+
#define CONFIG_IDF_TARGET_ARCH_RISCV 1
20+
#define CONFIG_MMU_PAGE_SIZE 0x10000
21+
#define SOC_MMU_PAGE_SIZE CONFIG_MMU_PAGE_SIZE /* from soc/CMakeLists */
22+
#define CONFIG_XTAL_FREQ 40
23+
#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
24+
#define CONFIG_MCUBOOT 1
25+
#define NDEBUG 1
26+
#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
27+
#ifdef CONFIG_ESP_CONSOLE_UART_NUM
28+
#define CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM CONFIG_ESP_CONSOLE_UART_NUM
29+
#endif
30+
#ifdef CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
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#define CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM ESP_ROM_USB_SERIAL_DEVICE_NUM
32+
#endif
33+
#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200
34+
#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x2000
35+
#define CONFIG_PARTITION_TABLE_OFFSET 0x10000
36+
#define CONFIG_EFUSE_MAX_BLK_LEN 256
37+
#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
38+
#define CONFIG_BOOTLOADER_CPU_CLK_FREQ_MHZ 80

‎boot/espressif/hal/include/mcuboot_config/mcuboot_logging.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,8 @@ extern int ets_printf(const char *fmt, ...);
2727
#define TARGET "[esp32c3]"
2828
#elif CONFIG_IDF_TARGET_ESP32C6
2929
#define TARGET "[esp32c6]"
30+
#elif CONFIG_IDF_TARGET_ESP32C5
31+
#define TARGET "[esp32c5]"
3032
#elif CONFIG_IDF_TARGET_ESP32C2
3133
#define TARGET "[esp32c2]"
3234
#elif CONFIG_IDF_TARGET_ESP32H2

‎boot/espressif/port/esp32c5/bootloader.conf‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,100 @@
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# SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
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#
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# SPDX-License-Identifier: Apache-2.0
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# Define upgrade mode (default is CONFIG_ESP_BOOT_SWAP_USING_SCRATCH)
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# CONFIG_ESP_BOOT_SWAP_USING_MOVE=y
7+
# CONFIG_ESP_BOOT_UPGRADE_ONLY=y
8+
9+
CONFIG_ESP_FLASH_SIZE=4MB
10+
CONFIG_ESP_BOOTLOADER_SIZE=0xF000
11+
CONFIG_ESP_BOOTLOADER_OFFSET=0x2000
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CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x20000
13+
CONFIG_ESP_APPLICATION_SIZE=0x1C0000
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CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x1E0000
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CONFIG_ESP_MCUBOOT_WDT_ENABLE=y
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CONFIG_ESP_SCRATCH_OFFSET=0x3E0000
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CONFIG_ESP_SCRATCH_SIZE=0x1F000
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19+
CONFIG_BOOTLOADER_PROJECT_VER=0x1
20+
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# When enabled, prevents updating image to an older version
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# CONFIG_ESP_DOWNGRADE_PREVENTION=y
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# This option makes downgrade prevention rely also on security
24+
# counter (defined using imgtool) instead of only image version
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# CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=y
26+
27+
# Enables the MCUboot Serial Recovery, that allows the use of
28+
# MCUMGR to upload a firmware through the serial port
29+
# CONFIG_ESP_MCUBOOT_SERIAL=y
30+
# Use Serial through USB JTAG Serial port for Serial Recovery
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# CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG=y
32+
# Use sector erasing (recommended) instead of entire image size
33+
# erasing when uploading through Serial Recovery
34+
# CONFIG_ESP_MCUBOOT_ERASE_PROGRESSIVELY=y
35+
36+
# GPIO used to boot on Serial Recovery
37+
# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=3
38+
# GPIO input type (0 for Pull-down, 1 for Pull-up)
39+
# CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE=0
40+
# GPIO signal value
41+
# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1
42+
# Delay time for identify the GPIO signal
43+
# CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5
44+
# UART port used for serial communication (not needed when using USB)
45+
# CONFIG_ESP_SERIAL_BOOT_UART_NUM=1
46+
# GPIO for Serial RX signal
47+
# CONFIG_ESP_SERIAL_BOOT_GPIO_RX=8
48+
# GPIO for Serial TX signal
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# CONFIG_ESP_SERIAL_BOOT_GPIO_TX=9
50+
# Baudrate for Serial Recovery communication
51+
# CONFIG_ESP_SERIAL_BOOT_BAUDRATE=115200
52+
53+
# Use UART0 for console printing (use either UART or USB alone)
54+
CONFIG_ESP_CONSOLE_UART=y
55+
CONFIG_ESP_CONSOLE_UART_NUM=0
56+
# Configures alternative UART port for console printing
57+
# (UART_NUM=0 must not be changed)
58+
# CONFIG_ESP_CONSOLE_UART_CUSTOM=y
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# CONFIG_ESP_CONSOLE_UART_TX_GPIO=9
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# CONFIG_ESP_CONSOLE_UART_RX_GPIO=8
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# Use USB JTAG Serial for console printing
62+
# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y
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64+
# CONFIG_ESP_SIGN_EC256=y
65+
# CONFIG_ESP_SIGN_ED25519=n
66+
# CONFIG_ESP_SIGN_RSA=n
67+
# CONFIG_ESP_SIGN_RSA_LEN=2048
68+
69+
# Use Tinycrypt lib for EC256 or ED25519 signing
70+
# CONFIG_ESP_USE_TINYCRYPT=y
71+
# Use Mbed TLS lib for RSA image signing
72+
# CONFIG_ESP_USE_MBEDTLS=n
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74+
# It is strongly recommended to generate a new signing key
75+
# using imgtool instead of use the existent sample
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# CONFIG_ESP_SIGN_KEY_FILE=root-ec-p256.pem
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78+
# Hardware Secure Boot related options
79+
# CONFIG_SECURE_SIGNED_ON_BOOT=1
80+
# CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1
81+
# CONFIG_SECURE_BOOT=1
82+
# CONFIG_SECURE_BOOT_V2_ENABLED=1
83+
# CONFIG_SECURE_BOOT_SUPPORTS_RSA=1
84+
85+
# Hardware Flash Encryption related options
86+
# CONFIG_SECURE_FLASH_ENC_ENABLED=1
87+
# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1
88+
# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=1
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# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=1
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# CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=1
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# CONFIG_SECURE_BOOT_ALLOW_JTAG=1
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# CONFIG_SECURE_BOOT_ALLOW_ROM_BASIC=1
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94+
# Options for enabling eFuse emulation in Flash (adjust
95+
# CONFIG_EFUSE_VIRTUAL_OFFSET accordingly in order
96+
# to not overlap with other flash regions)
97+
# CONFIG_EFUSE_VIRTUAL=1
98+
# CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH=1
99+
# CONFIG_EFUSE_VIRTUAL_OFFSET=0x250000
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# CONFIG_EFUSE_VIRTUAL_SIZE=0x2000

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