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1.18-macro-suite-catchup-deferral.md

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1.18 — Macro suite catch-up — deferral note

Spec 047 §14 Phase 1 task 1.18 calls for landing macros L2, L3, L4, and the L6 V2 variant on both Phase 0 baseline machines.

Status

Deferred for execution on the baseline machines. Same constraint as 1.17: the macro variants require the Phase 0 baseline-hardware runbook and environment isolation that cannot be reproduced in the orchestrator's context.

What lands in this PR (code scaffold)

The following projects exist as Phase 0 stubs (per macro-suite-status.md):

  • tests/startup_perf/BlankReactorV2 — TTFF time-to-first-frame harness.
  • tests/stress_perf/StressPerf.ReactorV2 — V2 path variant of the existing StressPerf.Reactor scenarios.

For 1.18 specifically, these macros need their three-variant (Direct / ReactorToday / ReactorV2) shape:

  • L2 TTFF_LoginForm — six-control login form, all three variants.
  • L3 TTFF_SettingsPage — 50-control mixed page, all three variants.
  • L4 WorkingSet_AtStartup — snapshot private bytes + managed heap after first frame. Reuses L2 binaries.
  • L6 V2 variant — StressPerf.VirtualList.ReactorV2, mirrors the existing StressPerf.VirtualList project. Currently labelled "deferred from Phase 0 with the explicit note 'mirrors the existing Reactor project'" in macro-suite-status.md.

The Reactor V2 path in Phase 1 = useV1Protocol: true + the five ported controls (ToggleSwitch, Slider, TextBox, Border, ListView). The L2 login form composes from these five, so it's a clean test of the V1 path on a realistic scenario.

Run plan

For each baseline machine (LAPTOP-4MEP83VI ARM64-native and CPC-ander-YTZ3O x64-native):

  1. Build all three variants for L2 / L3.
  2. Run each variant ≥ 3 times per spec §15.5 (--ci-min-reps 3).
  3. Capture private bytes + managed heap deltas for L4.
  4. Run StressPerf.VirtualList.ReactorV2 at the standard 10k-item config for L6 V2.
  5. Stream JSON-Lines to docs/specs/047/phase1-results/<machine>/<date>/macro/.
  6. Run tools/spec047-aggregator for the comparison tables.

L5 / L7 / L8 / L9 / L11 — deliberately deferred

Per the task file: "L5 / L7 / L8 / L9 / L11 stay deferred per Phase 0 — they aren't gates for Phase 1 exit, and the WTS plumbing they need isn't in scope. They land during Phase 3 controls migration."

No change in this PR.