Skip to content
Windows GPU TensorRT CI Pipeline

[Core] Expose a session option to disable NCHWc layout optimizations #10188

Sign in to view logs

[Core] Expose a session option to disable NCHWc layout optimizations

[Core] Expose a session option to disable NCHWc layout optimizations #10188

Triggered via pull request February 5, 2026 04:19
@hariharans29hariharans29
synchronize #27248
hari/intel_vs_amd_takeaway
Status Success
Total duration 3h 30m 41s
Artifacts 1

windows_tensorrt.yml

on: pull_request
Windows GPU TensorRT CI Pipeline
40m 54s
Windows GPU TensorRT CI Pipeline
Windows GPU TensorRT CI Pipeline Test Job
39m 9s
Windows GPU TensorRT CI Pipeline Test Job
Fit to window
Zoom out
Zoom in

Annotations

6 warnings
Windows GPU TensorRT CI Pipeline: onnxruntime/core/mlas/lib/amd64/QgemmU8X8KernelAvx2.asm#L1234
epilog offset from end of function exceeds 4095
Windows GPU TensorRT CI Pipeline: onnxruntime/core/mlas/lib/amd64/QgemmU8X8KernelAvx2.asm#L1227
epilog offset from end of function exceeds 4095
Windows GPU TensorRT CI Pipeline: onnxruntime/core/mlas/lib/amd64/QgemmU8X8KernelAvx2.asm#L1220
epilog offset from end of function exceeds 4095
Windows GPU TensorRT CI Pipeline: onnxruntime/core/mlas/lib/amd64/QgemmU8X8KernelAvx2.asm#L1213
epilog offset from end of function exceeds 4095
Windows GPU TensorRT CI Pipeline: onnxruntime/core/mlas/lib/amd64/QgemmU8X8KernelAvx2.asm#L1206
epilog offset from end of function exceeds 4095
Windows GPU TensorRT CI Pipeline: onnxruntime/core/mlas/lib/amd64/QgemmU8X8KernelAvx2.asm#L1199
epilog offset from end of function exceeds 4095

Artifacts

Produced during runtime
Name Size Digest
build-artifacts Expired
1.89 GB
sha256:bea96ec86f20c25a23f71bd2a731de1f9d6af7c18fde5ab5d6de282dd0bcd887