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Concrete patterns showing how to translate a user question into a navigation path and synthesize an answer.
Navigation path:
queries/by-kernel-type.md→ findgemmrow → lists kernel pages- Read
wiki/kernels/fp8-block-scale-gemm.mdandwiki/kernels/nvfp4-gemm.md - Follow
sources:to concrete PRs:pr-cutlass-2139(blockwise+groupwise GEMM),pr-vllm-13798(FP8 GEMM) - For optimization path, read
wiki/techniques/warp-specialization.md,wiki/techniques/persistent-kernels.md - For progression, cite the tcgen05 tutorial (
sources/blogs/tcgen05-tutorial.md): Naive 17% → 128B-swizzled 3D TMA 46% → Pipelining 62% → Warp specialization 80% → 2-SM 86% → persistent static scheduling 98%
Command:
python3 scripts/query.py --type kernel --tag gemm --architecture sm100Navigation path:
queries/by-problem.md→ find "low-sm-utilization" row- Pattern page:
wiki/patterns/low-sm-utilization.md - Candidate techniques:
technique-persistent-kernels,technique-tile-scheduling,hw-clc - Read the CLC page:
wiki/hardware/clc.mdfor code example - Cite: the tcgen05 tutorial showed 86% → 98% with static persistent scheduling. It presents CLC only as a possible follow-on exercise; use
wiki/hardware/clc.mdfor the separate CLC mechanism.
Command:
python3 scripts/query.py --symptom low-sm-utilization
python3 scripts/get_page.py pattern-low-sm-utilizationNavigation path:
queries/by-hardware-feature.md→ findtcgen05row → lists all relevant pagesqueries/by-repo.md→ NVIDIA/cutlass section- Cross-reference via tag filter
Command:
python3 scripts/query.py --tag tcgen05 --repo cutlass --limit 30
python3 scripts/grep_wiki.py "tcgen05\\.mma" --only sourcesTip: the --tag filter also accepts aliases, so --tag UMMA resolves to tcgen05.
Navigation path:
- Direct:
wiki/kernels/flash-attention-4.md - Performance: up to 1613 TFLOPS on B200 BF16 (71%) in the paper's sweep
- Techniques used: ping-pong scheduling, software exp, 2-CTA backward
- Follow sources →
sources/docs/flash-attention-4.md(paper),sources/blogs/flash-attention-4.md(author blog)
Command:
python3 scripts/get_page.py kernel-flash-attention-4 --follow-sourcesNavigation path:
wiki/migration/wgmma-to-tcgen05.md— dedicated migration guide withblackwell_relevancefieldwiki/hardware/tcgen05-mma.md— canonical reference for the new instruction- Contrast with Hopper behavior implicit in the migration page
Command:
python3 scripts/get_page.py migration-wgmma-to-tcgen05
python3 scripts/get_page.py hw-tcgen05-mmaNavigation path:
sources/contests/gpu-mode-nvfp4/(4 problems)- Each problem page records the organizer task definition, speed-of-light values when published, and a dated leaderboard snapshot; no page declares a per-submission listing
- Read participant blogs:
sources/blogs/yue-nvfp4-hackathon.md,sources/blogs/amandeep-nvfp4-attempts.md,sources/blogs/simon-nvfp4-gemv.md - Techniques: PTX-level control, cache policy differentiation, register budgeting
Command:
python3 scripts/query.py --type contest --tag nvfp4
python3 scripts/get_page.py contest-gpumode-p1Navigation path:
wiki/kernels/gated-delta-net.md— conceptual + codewiki/languages/triton-blackwell.md— current Triton 3.6+ Blackwell lowering surfaces (tcgen05 + TMEM via descriptor/TMA + warp_specialize,tl.dot_scaled, Gluon multi-CTA); its opening paragraph records that the earlier pre-3.6 no-TMEM/no-tcgen05 framing is obsolete for 3.6- Source PRs:
pr-vllm-*for gated_delta, FlashInfer GDN kernels
Command:
python3 scripts/query.py "gated delta net decode" --language tritonNavigation path:
wiki/patterns/memory-bound.md— candidate techniques listwiki/techniques/vectorized-loads.md— wide loads + cache policies (coversevict_first/no_allocate)- Case study:
wiki/kernels/nvfp4-gemv.mdrecords the author's 22.392 μs final aggregate; the staged 2000 → 443 → 39 → 27 → 22.392 μs sequence is onwiki/techniques/vectorized-loads.md, where the source attributes each step to a combination of edits
Command:
python3 scripts/query.py --symptom memory-boundCommand:
python3 scripts/query.py --repo flashinfer --tag moe --limit 30
python3 scripts/query.py --repo flashinfer --tag fp8 --limit 30
python3 scripts/grep_wiki.py "fp8" "moe" --only sources --files-onlyNavigation path:
wiki/languages/ptx-sm100.md— direct reference- Cross-reference: tcgen05.alloc/mma/ld/st/dealloc/fence, clusterlaunchcontrol.try_cancel, cp.async.bulk.tensor multicast
Command:
python3 scripts/get_page.py lang-ptx --body-only
python3 scripts/grep_wiki.py "tcgen05" --only wiki --context 0For most questions, a high-quality answer follows this shape:
1. Topic framing (1-2 sentences, cite wiki page)
→ Pull from wiki/<section>/<topic>.md ## Overview
2. Technical mechanism (cite hardware + technique pages)
→ wiki/hardware/*.md for hw details
→ wiki/techniques/*.md for optimization patterns
3. Concrete code snippet (copy from wiki page, already validated)
→ Every technique/kernel/language page has a compilable snippet
4. Performance evidence (cite performance_claims)
→ Always report gpu, dtype, shape, metric, value, source_id
5. References (cite source IDs)
→ PR: pr-cutlass-2139 → sources/prs/cutlass/PR-2139.md
→ Blog/doc: blog-* / doc-*
- Don't recommend techniques without citing
sources:— the wiki exists precisely for this. - Don't quote performance without the full 6-field
performance_claimsrecord. - Don't conflate
sm90andsm100patterns — always check thearchitectures:field. - Don't cite
verifiedclaims without checking the page actually hasevidence_basisentries that name both an official doc and an upstream code source. - Don't recommend DeepEP/DualPipe/EPLB — they're explicitly out of scope (kernel-only KB).