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Generate #1551

Triggered via schedule October 27, 2025 07:32
Status Success
Total duration 8m 8s
Artifacts

tests.yml

on: schedule
STM32: F4, G4, L0, H5
7m 59s
STM32: F4, G4, L0, H5
STM32: C0, G0, U0, H7, L4
7m 24s
STM32: C0, G0, U0, H7, L4
STM32: F0, F1, F2, F3, F7, L1, L5, WB, WL, U3, U5
7m 50s
STM32: F0, F1, F2, F3, F7, L1, L5, WB, WL, U3, U5
AVR, SAM, NRF, RP
1m 1s
AVR, SAM, NRF, RP
keep-alive
3s
keep-alive
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