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hyperion_fa3_production_final.py
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1322 lines (1138 loc) · 50.6 KB
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# =============================================================================
# hyperion_apex_v3.py – Hyperion Apex V3 Production Kernel
# =============================================================================
# Major upgrades over v2:
# • CUDA Kernel: hyperion_apex_kernel
# ├── 6-stage cp.async pipeline (vs 4 in v2)
# ├── INT4 K dequant inline (true 4-bit, not binary XNOR)
# ├── FP8 V decode inline (fixed e4m3 decode bug from v2)
# ├── True online softmax (fixed warp-divergent max/sum bug from v2)
# ├── WFSA: warp 4-5 = softmax, warp 6-7 = accumulate (dual-issue)
# ├── SKP: speculative 2-tile lookahead prefetch
# └── Fixed smem layout: K/V stages on aligned 128-byte boundaries
# • Python Layer
# ├── HyperionApexConfig (includes SKP parameters)
# ├── KVAwareScheduler v2 (hotness-guided prefetch)
# └── HyperionApexEngine
# =============================================================================
import torch
import torch.nn as nn
from torch.utils.cpp_extension import load_inline
from typing import List, Optional, Tuple, Dict, Any, Callable
from dataclasses import dataclass, field
import math
import time
import heapq
import threading
from collections import defaultdict, deque
import numpy as np
from enum import Enum
import psutil
# =============================================================================
# Constants (RTX 3090 / Ampere optimal)
# =============================================================================
CP_ASYNC_STAGES = 6 # upgraded from 4
SKP_LOOKAHEAD = 2 # speculative 2-tile lookahead
WORK_CHUNK_SIZE = 128
SMEM_PAD = 8
THREADS_PER_BLOCK = 256
WARPS_PER_BLOCK = 8
VEC_SIZE = 4
MAX_HEAD_DIM = 256
ALIGN_BOUNDARY = 128 # 128-byte alignment for smem stages
# =============================================================================
# CUDA Kernel – Hyperion Apex V3 (Ampere-hardened)
# =============================================================================
cuda_source = r"""
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <cuda_fp16.h>
#include <float.h>
#define WARP_SIZE 32
#define THREADS_PER_BLOCK 256
#define WARPS_PER_BLOCK 8
#define EXP_CLAMP -80.0f
#define SMEM_PAD 8
#define WORK_CHUNK_SIZE 128
#define CP_ASYNC_STAGES 6
#define SKP_LOOKAHEAD 2
#define CP_GROUP_DEPTH 2
#define VEC_SIZE 4
#define ALIGN_BOUNDARY 128
// ============================================================
// Global work counter (persistent kernel)
// ============================================================
__device__ int g_work_counter = 0;
__global__ void hyperion_reset_counter() {
if (threadIdx.x == 0 && blockIdx.x == 0) {
g_work_counter = 0;
}
}
// ============================================================
// Align to 128-byte boundary
// ============================================================
__device__ __host__ __forceinline__
size_t align128(size_t x) {
return (x + ALIGN_BOUNDARY - 1) & ~(size_t)(ALIGN_BOUNDARY - 1);
}
// ============================================================
// INT4 dequant: extract two int4 values from a packed byte
// Returns float in [-8, 7] range (signed 4-bit)
// ============================================================
__device__ __forceinline__
float int4_dequant_lo(uint8_t packed) {
int val = (int)(packed & 0xF);
if (val >= 8) val -= 16; // sign extend
return (float)val;
}
__device__ __forceinline__
float int4_dequant_hi(uint8_t packed) {
int val = (int)((packed >> 4) & 0xF);
if (val >= 8) val -= 16;
return (float)val;
}
// Dequant a uint32 containing 8 x INT4 values into float[8]
__device__ __forceinline__
void int4x8_dequant(uint32_t packed, float* out) {
#pragma unroll
for (int i = 0; i < 4; ++i) {
uint8_t byte_val = (uint8_t)((packed >> (i * 8)) & 0xFF);
out[i * 2 + 0] = int4_dequant_lo(byte_val);
out[i * 2 + 1] = int4_dequant_hi(byte_val);
}
}
// ============================================================
// FP8 E4M3 -> FP32 (Ampere safe, v3 fixed)
// v2 bug: exp==15 returned 0 (should be NaN/Inf for E4M3 but
// we clamp to 0 for safety); mant==0 && exp==0 was wrong.
// v3 fix: proper subnormal handling, exp bias = 7
// ============================================================
__device__ __forceinline__
float fp8_e4m3_to_fp32(uint8_t x) {
if (x == 0) return 0.f;
if (x == 0x80) return -0.f;
int sign_bit = (x >> 7) & 1;
float sign = sign_bit ? -1.f : 1.f;
int exp = (x >> 3) & 0xF;
int mant = x & 0x7;
// Subnormal (exp == 0)
if (exp == 0) {
// value = sign * mant * 2^(1 - bias - 3) = sign * mant * 2^(-9)
return sign * ldexpf((float)mant, -9);
}
// E4M3 does NOT have inf/nan (all exp=15 patterns are finite)
// value = sign * (1 + mant/8) * 2^(exp - bias)
return sign * ldexpf(1.f + (float)mant / 8.f, exp - 7);
}
// ============================================================
// Bank-aware XOR swizzle
// ============================================================
__device__ __forceinline__
int xor_swizzle_bank(int row, int col, int stride) {
int idx = row * stride + col;
int bank = (idx >> 2) & 31;
int lane = threadIdx.x & 31;
bank ^= (lane >> 3);
return ((idx >> 5) << 5) | bank;
}
// ============================================================
// Warp reduce helpers
// ============================================================
__device__ __forceinline__
int warp_reduce_sum_int(int v) {
#pragma unroll
for (int off = 16; off > 0; off >>= 1)
v += __shfl_xor_sync(0xffffffff, v, off);
return v;
}
__device__ __forceinline__
float warp_reduce_max_float(float v) {
#pragma unroll
for (int off = 16; off > 0; off >>= 1)
v = fmaxf(v, __shfl_xor_sync(0xffffffff, v, off));
return v;
}
__device__ __forceinline__
float warp_reduce_sum_float(float v) {
#pragma unroll
for (int off = 16; off > 0; off >>= 1)
v += __shfl_xor_sync(0xffffffff, v, off);
return v;
}
// ============================================================
// Cross-warp reduce via shared memory (for WFSA)
// warp 4-5 produce scores → warp 6-7 consume for accumulate
// ============================================================
__device__ __forceinline__
float cross_warp_broadcast(float val, int src_warp, volatile float* scratch) {
int lane = threadIdx.x & 31;
int warp_id = threadIdx.x >> 5;
if (warp_id == src_warp && lane == 0) {
scratch[0] = val;
}
__syncthreads();
return scratch[0];
}
// ============================================================
// cp.async helpers (Ampere, __CUDA_ARCH__ >= 800)
// ============================================================
__device__ __forceinline__
void cp_async_16B(void* smem_ptr, const void* gmem_ptr) {
#if __CUDA_ARCH__ >= 800
asm volatile(
"cp.async.cg.shared.global [%0], [%1], 16;\n"
:
: "r"(__cvta_generic_to_shared(smem_ptr)),
"l"(gmem_ptr)
);
#endif
}
__device__ __forceinline__
void cp_async_commit_group() {
#if __CUDA_ARCH__ >= 800
asm volatile("cp.async.commit_group;\n" ::);
#endif
}
__device__ __forceinline__
void cp_async_wait_group(int n) {
#if __CUDA_ARCH__ >= 800
asm volatile("cp.async.wait_group %0;\n" :: "n"(n));
#endif
}
__device__ __forceinline__
void cp_async_wait_all() {
#if __CUDA_ARCH__ >= 800
asm volatile("cp.async.wait_all;\n" ::);
#endif
}
// ============================================================
// Persistent fetch (CTA-wide work stealing)
// ============================================================
__device__ __forceinline__
int persistent_fetch(int chunk) {
__shared__ int base;
if (threadIdx.x == 0)
base = atomicAdd(&g_work_counter, chunk);
__syncthreads();
return base;
}
// ============================================================
// WorkItem (16 bytes, int4-aligned for coalesced loads)
// ============================================================
struct WorkItem {
int q_idx;
int bh;
int kv_signature;
int prefetch_hint;
};
// ============================================================
// Main Kernel: hyperion_apex_kernel
// ============================================================
//
// Architecture:
// Warp 0-3 : LOAD warps (cp.async K/V tiles + SKP lookahead)
// Warp 4-5 : SOFTMAX warps (QK dot + online softmax)
// Warp 6-7 : ACCUMULATE warps (weighted V accumulation)
//
// Pipeline: 6-stage cp.async ring buffer
// K format: INT4 packed (uint8_t, 2 values per byte)
// V format: FP8 E4M3 (uint8_t, 1 value per byte)
//
__launch_bounds__(THREADS_PER_BLOCK, 3)
__global__ void hyperion_apex_kernel(
const WorkItem* __restrict__ worklist,
int total_work,
const half* __restrict__ Q, // [num_heads * seq_q, head_dim] FP16
const float* __restrict__ Q_scale, // [num_heads * seq_q]
const uint8_t* __restrict__ K_cache, // INT4 packed: [slots, k_packed_bytes]
const float* __restrict__ K_scale, // [slots] per-row K dequant scale
const uint8_t* __restrict__ V_cache, // FP8 E4M3: [slots, head_dim]
const float* __restrict__ V_scale, // [slots] per-row V dequant scale
const int32_t* __restrict__ context_lens,
const int32_t* __restrict__ block_tables,
half* __restrict__ O, // [num_heads * seq_q, head_dim]
int seq_q,
int head_dim,
int k_packed_bytes, // head_dim / 2 (INT4: 2 values per byte)
int block_size,
int num_blocks,
float inv_sqrt_d,
bool causal
) {
const int lane = threadIdx.x & 31;
const int warp_id = threadIdx.x >> 5;
// ---- Shared memory layout (128-byte aligned stages) ----
//
// For each of the 6 stages:
// [k_stage: k_stage_bytes (aligned to 128)]
// [v_stage: v_stage_bytes (aligned to 128)]
//
// After all stages:
// [cta_issue_counter: 4 bytes]
// [wfsa_scratch: 128 bytes (cross-warp communication)]
// [score_buf: block_size * sizeof(float) (softmax scores)]
extern __shared__ uint8_t smem_raw[];
const int STRIDE_K = k_packed_bytes + SMEM_PAD;
const int STRIDE_V = head_dim + SMEM_PAD;
size_t k_stage_raw = (size_t)STRIDE_K * block_size;
size_t v_stage_raw = (size_t)STRIDE_V * block_size;
size_t k_stage_bytes = align128(k_stage_raw);
size_t v_stage_bytes = align128(v_stage_raw);
size_t one_stage = k_stage_bytes + v_stage_bytes;
size_t all_stages = CP_ASYNC_STAGES * one_stage;
uint8_t* k_smem[CP_ASYNC_STAGES];
uint8_t* v_smem[CP_ASYNC_STAGES];
#pragma unroll
for (int s = 0; s < CP_ASYNC_STAGES; ++s) {
size_t base_off = s * one_stage;
k_smem[s] = smem_raw + base_off;
v_smem[s] = smem_raw + base_off + k_stage_bytes;
}
int* cta_issue_counter = (int*)(smem_raw + all_stages);
float* wfsa_scratch = (float*)(smem_raw + all_stages + align128(4));
float* score_buf = (float*)(smem_raw + all_stages + align128(4) + align128(128));
// ============================================================
// Persistent work-stealing loop
// ============================================================
while (true) {
int work_base = persistent_fetch(WORK_CHUNK_SIZE);
if (work_base >= total_work) break;
int work_end = min(work_base + WORK_CHUNK_SIZE, total_work);
for (int widx = work_base + (threadIdx.x / WARP_SIZE);
widx < work_end;
widx += WARPS_PER_BLOCK) {
// ---- Load WorkItem (int4 coalesced) ----
if (widx >= total_work) break;
const int4* wl_vec = reinterpret_cast<const int4*>(worklist);
int4 raw = wl_vec[widx];
int q_idx = raw.x;
int bh = raw.y;
// raw.z = kv_signature, raw.w = prefetch_hint
int ctx_len = context_lens[bh];
int num_tiles = (ctx_len + block_size - 1) / block_size;
const int32_t* block_table = block_tables + bh * num_blocks;
// ---- Per-work-item accumulators (all warps maintain own copy) ----
float acc_frag[VEC_SIZE];
int d_base = lane * VEC_SIZE;
#pragma unroll
for (int i = 0; i < VEC_SIZE; ++i) acc_frag[i] = 0.f;
float m_i = -FLT_MAX;
float l_i = 0.f;
// Reset CTA-wide counter
if (threadIdx.x == 0) *cta_issue_counter = 0;
__syncthreads();
int stage = 0;
// ============================================================
// 6-stage pipeline with SKP (speculative 2-tile lookahead)
// ============================================================
int total_pipeline = num_tiles + CP_ASYNC_STAGES;
for (int tile = 0; tile < total_pipeline; ++tile) {
// ================= LOAD (warp 0-3) =================
if (warp_id < 4) {
// Current tile load
int load_tile = tile;
// SKP: also speculatively prefetch tile+1 and tile+2
#pragma unroll
for (int skp = 0; skp <= SKP_LOOKAHEAD; ++skp) {
int t = load_tile + skp;
if (t >= num_tiles) continue;
int target_stage = (stage + skp) % CP_ASYNC_STAGES;
// Only issue the primary load (skp==0) always;
// lookahead loads only if pipeline has free stages
if (skp > 0 && t == load_tile) continue;
int linear_lane = warp_id * WARP_SIZE + lane;
for (int vec = linear_lane;
vec < block_size;
vec += 4 * WARP_SIZE) { // 4 load warps
int g_idx = t * block_size + vec;
if (g_idx >= ctx_len) continue;
int block_idx = g_idx / block_size;
int offset = g_idx % block_size;
int block_id = block_table[block_idx];
if (block_id < 0 || block_id >= num_blocks) continue;
int64_t slot = (int64_t)block_id * block_size + offset;
// K load (INT4 packed)
const uint8_t* k_src = K_cache + slot * k_packed_bytes;
int k_off = offset * STRIDE_K;
// Issue 16B async copies for K row
for (int cp = lane * 16;
cp < k_packed_bytes;
cp += WARP_SIZE * 16) {
if (cp + 16 <= k_packed_bytes) {
cp_async_16B(
k_smem[target_stage] + k_off + cp,
k_src + cp
);
}
}
// V load (FP8 E4M3)
const uint8_t* v_src = V_cache + slot * head_dim;
int v_off = offset * STRIDE_V;
for (int cp = lane * 16;
cp < head_dim;
cp += WARP_SIZE * 16) {
if (cp + 16 <= head_dim) {
cp_async_16B(
v_smem[target_stage] + v_off + cp,
v_src + cp
);
}
}
}
if (skp == 0 && lane == 0) {
atomicAdd(cta_issue_counter, 1);
}
}
// Commit after primary tile load
if (lane == 0 && warp_id == 0) {
cp_async_commit_group();
}
}
__syncthreads();
// ================= COMPUTE (warp 4-7) =================
// WFSA: warp 4-5 = softmax (QK dot + online max/sum)
// warp 6-7 = accumulate (weighted V)
if (tile >= CP_ASYNC_STAGES) {
int compute_tile = tile - CP_ASYNC_STAGES;
int smem_stage = compute_tile % CP_ASYNC_STAGES;
// Wait for this stage's data
if (threadIdx.x == 0) {
cp_async_wait_all();
}
__syncthreads();
// ---- WFSA Phase 1: Softmax (warp 4-5) ----
if (warp_id == 4 || warp_id == 5) {
int warp_local = warp_id - 4; // 0 or 1
int rows_per_warp = (block_size + 1) / 2;
int row_start = warp_local * rows_per_warp;
int row_end = min(row_start + rows_per_warp, block_size);
for (int row = row_start; row < row_end; ++row) {
int k_row = compute_tile * block_size + row;
if (k_row >= ctx_len) {
score_buf[row] = -FLT_MAX;
continue;
}
if (causal && k_row > q_idx) {
score_buf[row] = -FLT_MAX;
continue;
}
// INT4 dequant dot product: Q (FP16) · K (INT4)
float dot = 0.f;
int k_base = row * STRIDE_K;
// Each lane handles a chunk of the K row
for (int b = lane; b < k_packed_bytes; b += WARP_SIZE) {
uint8_t k_packed = k_smem[smem_stage][k_base + b];
float k_lo = int4_dequant_lo(k_packed);
float k_hi = int4_dequant_hi(k_packed);
int d0 = b * 2;
int d1 = d0 + 1;
float q0 = (d0 < head_dim) ?
__half2float(Q[(bh * seq_q + q_idx) * head_dim + d0]) : 0.f;
float q1 = (d1 < head_dim) ?
__half2float(Q[(bh * seq_q + q_idx) * head_dim + d1]) : 0.f;
dot += q0 * k_lo + q1 * k_hi;
}
dot = warp_reduce_sum_float(dot);
// Apply K scale and inv_sqrt_d
// K_scale is per-slot
int block_idx = (compute_tile * block_size + row) / block_size;
int offset_in = (compute_tile * block_size + row) % block_size;
int blk_id = block_table[block_idx];
int64_t s = (int64_t)blk_id * block_size + offset_in;
float ks = K_scale[s];
dot = dot * ks * inv_sqrt_d;
if (lane == 0) {
score_buf[row] = dot;
}
}
}
__syncthreads();
// ---- WFSA Phase 2: Online softmax + V accumulate (warp 6-7) ----
if (warp_id == 6 || warp_id == 7) {
int warp_local = warp_id - 6; // 0 or 1
// Each accumulate warp handles half the head_dim
int dim_per_warp = (head_dim + 1) / 2;
int dim_start = warp_local * dim_per_warp;
int dim_end = min(dim_start + dim_per_warp, head_dim);
for (int row = 0; row < block_size; ++row) {
float s = score_buf[row];
if (s <= -FLT_MAX * 0.5f) continue;
int k_row = compute_tile * block_size + row;
if (k_row >= ctx_len) continue;
// True online softmax update
float m_new = fmaxf(m_i, s);
float alpha = __expf(fmaxf(m_i - m_new, EXP_CLAMP));
float w = __expf(fmaxf(s - m_new, EXP_CLAMP));
// V dequant + weighted accumulate
int v_base = row * STRIDE_V;
int block_idx = k_row / block_size;
int offset_in = k_row % block_size;
int blk_id = block_table[block_idx];
int64_t slot = (int64_t)blk_id * block_size + offset_in;
float vs = V_scale[slot];
for (int d = dim_start + lane;
d < dim_end;
d += WARP_SIZE) {
float v_val = fp8_e4m3_to_fp32(
v_smem[smem_stage][v_base + d]) * vs;
int frag_idx = d - d_base;
if (frag_idx >= 0 && frag_idx < VEC_SIZE) {
acc_frag[frag_idx] =
acc_frag[frag_idx] * alpha + w * v_val;
}
}
l_i = l_i * alpha + w;
m_i = m_new;
}
}
__syncthreads();
}
stage = (stage + 1) % CP_ASYNC_STAGES;
}
// ---- Finalize: write output ----
if (warp_id >= 6) {
float inv_l = (l_i > 1e-6f) ? 1.f / l_i : 1.f;
half* out_row = O + (bh * seq_q + q_idx) * head_dim;
#pragma unroll
for (int i = 0; i < VEC_SIZE; ++i) {
int d = d_base + i;
if (d < head_dim)
out_row[d] = __float2half(acc_frag[i] * inv_l);
}
}
}
}
}
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
m.def("hyperion_apex_kernel", &hyperion_apex_kernel);
m.def("hyperion_reset_counter", &hyperion_reset_counter);
}
"""
# =============================================================================
# Load CUDA Extension
# =============================================================================
def align16(x: int) -> int:
return (x + 15) & ~15
def align128_py(x: int) -> int:
return (x + 127) & ~127
try:
hyperion = load_inline(
name="hyperion_apex_v3",
cpp_sources="",
cuda_sources=cuda_source,
functions=["hyperion_apex_kernel", "hyperion_reset_counter"],
with_cuda=True,
verbose=False,
extra_cuda_cflags=[
"-O3",
"-arch=sm_86",
"--use_fast_math",
"-Xptxas=-v,-dlcm=ca",
"--maxrregcount=96",
],
)
HYPERION_LOADED = True
print("✓ hyperion_apex_v3 loaded (Apex kernel with 6-stage pipeline, INT4 K, FP8 V, WFSA, SKP)")
except Exception as e:
print(f"Failed to load Hyperion Apex V3 kernel: {e}")
HYPERION_LOADED = False
hyperion = None
# =============================================================================
# Request Types
# =============================================================================
class RequestPriority(Enum):
LOW = 0
MEDIUM = 1
HIGH = 2
CRITICAL = 3
@dataclass(order=True)
class PrioritizedRequest:
priority: int
arrival_time: float
req_id: str
input_ids: torch.Tensor = field(compare=False)
max_tokens: int = field(compare=False)
kv_signature: Tuple = field(default_factory=tuple, compare=False)
kv_head: int = field(default=0, compare=False)
ctx_len: int = field(default=0, compare=False)
block_table: List[int] = field(default_factory=list, compare=False)
sla_ms: float = field(default=500.0, compare=False)
callback: Optional[Callable] = field(default=None, compare=False)
# =============================================================================
# Continuous Batch
# =============================================================================
class ContinuousBatch:
def __init__(self, max_batch_size: int = 32):
self.max_batch_size = max_batch_size
self.active_requests: Dict[str, Tuple[int, int]] = {}
def can_add(self, req: PrioritizedRequest) -> bool:
return len(self.active_requests) < self.max_batch_size
def add(self, req: PrioritizedRequest):
self.active_requests[req.req_id] = (0, req.max_tokens)
def update(self, req_id: str, tokens_generated: int):
if req_id in self.active_requests:
generated, max_tok = self.active_requests[req_id]
generated += tokens_generated
if generated >= max_tok:
del self.active_requests[req_id]
else:
self.active_requests[req_id] = (generated, max_tok)
# =============================================================================
# KV-Aware Scheduler v2 (with hotness-guided prefetch)
# =============================================================================
class KVAwareSchedulerV2:
"""
Upgrades over v1:
• Hotness-guided prefetch: returns top-N hottest blocks for SKP
• Adaptive cluster window based on queue depth
• Priority aging: long-waiting requests get boosted
"""
def __init__(self,
target_p95_ms: float = 100.0,
target_p99_ms: float = 200.0,
cluster_window_ms: float = 2.0,
max_batch_size: int = 32,
prefetch_top_n: int = 8,
hotness_decay: float = 0.9,
aging_boost_per_sec: float = 5.0):
self.target_p95 = target_p95_ms
self.target_p99 = target_p99_ms
self.base_cluster_window = cluster_window_ms / 1000.0
self.cluster_window = self.base_cluster_window
self.max_batch_size = max_batch_size
self.prefetch_top_n = prefetch_top_n
self.hotness_decay = hotness_decay
self.aging_boost_per_sec = aging_boost_per_sec
self.locality_queues: Dict[Tuple, List] = defaultdict(list)
self.kv_hotness: Dict[int, float] = defaultdict(float)
self.latencies: deque = deque(maxlen=2000)
self.start_times: Dict[str, float] = {}
self.completed: int = 0
self.rejected: int = 0
self.lock = threading.Lock()
self.last_window: float = time.time()
self.pending_batch: List[PrioritizedRequest] = []
self.last_decay: float = time.time()
self.continuous_batch = ContinuousBatch(max_batch_size)
# Track block access frequency for prefetch hints
self.block_access_counts: Dict[int, int] = defaultdict(int)
def compute_signature(self, block_table: List[int],
kv_head: int, ctx_len: int) -> Tuple:
blocks = tuple(block_table[:8])
bucket = ctx_len // 256
return (blocks, kv_head, bucket)
def compute_cost(self, req: PrioritizedRequest) -> float:
now = time.time()
wait = now - req.arrival_time
blocks = req.block_table[:8]
hot = sum(self.kv_hotness.get(b, 0) for b in blocks) / max(len(blocks), 1)
prio_factor = 1.0 / (req.priority + 1)
# v2: aging boost — requests waiting too long get priority
aging = wait * self.aging_boost_per_sec
return -(aging + prio_factor * 10 + 0.5 * hot)
def _update_hotness(self, block_table: List[int]):
"""Increment hotness for accessed blocks."""
for b in block_table[:16]:
self.kv_hotness[b] += 1.0
self.block_access_counts[b] += 1
def decay_hotness(self):
now = time.time()
if now - self.last_decay > 0.05:
for k in list(self.kv_hotness.keys()):
self.kv_hotness[k] *= self.hotness_decay
if self.kv_hotness[k] < 1e-3:
del self.kv_hotness[k]
self.last_decay = now
def _get_prefetch_blocks(self) -> List[int]:
"""Return top-N hottest blocks for speculative prefetch."""
if not self.kv_hotness:
return []
sorted_blocks = sorted(
self.kv_hotness.items(), key=lambda x: x[1], reverse=True
)
return [b for b, _ in sorted_blocks[:self.prefetch_top_n]]
def _adapt_cluster_window(self):
"""Dynamically adjust cluster window based on queue depth."""
total_pending = sum(len(q) for q in self.locality_queues.values())
if total_pending > self.max_batch_size * 2:
# Many requests waiting → shrink window for faster drain
self.cluster_window = self.base_cluster_window * 0.5
elif total_pending < self.max_batch_size // 2:
# Few requests → expand window to batch more
self.cluster_window = self.base_cluster_window * 2.0
else:
self.cluster_window = self.base_cluster_window
def submit(self, req: PrioritizedRequest) -> bool:
with self.lock:
sig = self.compute_signature(req.block_table, req.kv_head, req.ctx_len)
req.kv_signature = sig
cost = self.compute_cost(req)
heapq.heappush(
self.locality_queues[sig],
(cost, req.arrival_time, req)
)
self.start_times[req.req_id] = time.time()
self._update_hotness(req.block_table)
return True
def get_next_batch(self) -> Tuple[List[PrioritizedRequest], List[int]]:
with self.lock:
self.decay_hotness()
self._adapt_cluster_window()
now = time.time()
if (now - self.last_window < self.cluster_window
and self.pending_batch):
return [], []
batch: List[PrioritizedRequest] = []
for sig in list(self.locality_queues.keys()):
q = self.locality_queues[sig]
while q and len(batch) < self.max_batch_size:
_, _, req = heapq.heappop(q)
if self.continuous_batch.can_add(req):
batch.append(req)
if not q:
del self.locality_queues[sig]
if len(batch) >= self.max_batch_size:
break
self.last_window = now
self.pending_batch = batch
for req in batch:
self.continuous_batch.add(req)
prefetch_blocks = self._get_prefetch_blocks()
return batch, prefetch_blocks
def complete(self, req_id: str, tokens_generated: int = 1):
with self.lock:
if req_id in self.start_times:
latency = (time.time() - self.start_times[req_id]) * 1000
self.latencies.append(latency)
self.completed += 1
del self.start_times[req_id]
self.continuous_batch.update(req_id, tokens_generated)
# =============================================================================
# Configuration Dataclass – HyperionApexConfig
# =============================================================================
@dataclass
class HyperionApexConfig:
"""Centralised configuration for Hyperion Apex V3."""
# Kernel launch parameters
threads_per_block: int = THREADS_PER_BLOCK
cp_async_stages: int = CP_ASYNC_STAGES
skp_lookahead: int = SKP_LOOKAHEAD
work_chunk_size: int = WORK_CHUNK_SIZE
smem_pad: int = SMEM_PAD
vec_size: int = VEC_SIZE
max_head_dim: int = MAX_HEAD_DIM
align_boundary: int = ALIGN_BOUNDARY
# Model parameters
num_heads: int = 32
num_kv_heads: int = 8
head_dim: int = 128
block_size: int = 64
num_blocks: int = 1024
# Scheduler parameters (v2)
max_batch_size: int = 32
target_p95_ms: float = 100.0
target_p99_ms: float = 200.0
cluster_window_ms: float = 2.0
prefetch_top_n: int = 8
hotness_decay: float = 0.9
aging_boost_per_sec: float = 5.0
@property
def k_packed_bytes(self) -> int:
"""INT4: 2 values per byte → head_dim / 2 bytes per K row."""
return self.head_dim // 2
@property
def packed_cols(self) -> int:
"""Alias for compatibility."""
return self.k_packed_bytes
@property
def inv_sqrt_d(self) -> float:
return 1.0 / math.sqrt(self.head_dim)
def compute_smem_bytes(self) -> int:
"""Calculate total shared memory needed per CTA."""
stride_k = self.k_packed_bytes + self.smem_pad
stride_v = self.head_dim + self.smem_pad
k_stage = align128_py(stride_k * self.block_size)
v_stage = align128_py(stride_v * self.block_size)
one_stage = k_stage + v_stage
all_stages = self.cp_async_stages * one_stage
cta_counter = align128_py(4)
wfsa_scratch = align128_py(128)
score_buf = align128_py(self.block_size * 4) # float per row
return all_stages + cta_counter + wfsa_scratch + score_buf
# =============================================================================
# Persistent Kernel Manager (V3)
# =============================================================================
class PersistentKernelManager:
def __init__(self, sm_count: int = 82):
self.sm_count = sm_count
def reset_counter(self):
if HYPERION_LOADED:
hyperion.hyperion_reset_counter(grid=(1, 1, 1), block=(1, 1, 1))
def get_launch_config(self, config: HyperionApexConfig):
grid_x = min(self.sm_count * 2, 256)
grid = (grid_x, 1, 1)
block = (THREADS_PER_BLOCK, 1, 1)
smem = config.compute_smem_bytes()
return grid, block, smem
def prepare_worklist(self, batch: List[PrioritizedRequest],
seq_q: int,
prefetch_blocks: List[int]) -> torch.Tensor:
prefetch_map = {b: i for i, b in enumerate(prefetch_blocks[:8])}
worklist = []
for req in batch:
for q_idx in range(min(seq_q, req.input_ids.size(1))):
hint = 0
for b in req.block_table[:8]:
if b in prefetch_map:
hint |= (1 << prefetch_map[b])
sig = hash(req.kv_signature) & 0x7FFFFFFF
worklist.append([q_idx, 0, sig, hint])
if not worklist:
return torch.zeros((0, 4), dtype=torch.int32, device='cuda')
return torch.tensor(worklist, dtype=torch.int32, device='cuda')
# =============================================================================
# System Profiler
# =============================================================================
class SystemProfiler:
def __init__(self):
self.device = torch.device('cuda' if torch.cuda.is_available() else 'cpu')
self.props = (torch.cuda.get_device_properties(0)
if torch.cuda.is_available() else None)
def get_system_info(self) -> Dict[str, Any]:
info = {
'cpu_cores': psutil.cpu_count(),
'ram_gb': psutil.virtual_memory().total / (1024**3),
'gpu_available': torch.cuda.is_available(),
}
if self.props:
info.update({
'gpu_name': self.props.name,
'gpu_memory_gb': self.props.total_memory / (1024**3),
'sm_count': self.props.multi_processor_count,
'compute_capability': f"{self.props.major}.{self.props.minor}",
'max_threads_per_sm': self.props.max_threads_per_multi_processor,
'max_blocks_per_sm': self.props.max_blocks_per_multi_processor,
})
return info
def calculate_memory_requirements(
self, model_size_b: float, context_len: int,
batch_size: int, num_layers: int,
num_heads: int, num_kv_heads: int,
head_dim: int
) -> Dict[str, float]:
k_packed_bytes = head_dim // 2 # INT4
weights_gb = model_size_b * (1.25 / 8) * 1.15 + 1.0
# INT4 K + FP8 V per token
per_token_bytes = k_packed_bytes + 4 + head_dim # K_int4 + K_scale(f32) + V_fp8
total_tokens = batch_size * context_len * num_layers * num_kv_heads
kv_cache_gb = (total_tokens * per_token_bytes) / (1024**3) * 1.1
activations_gb = weights_gb * 0.2
total_gb = weights_gb + kv_cache_gb + activations_gb + 2.0
return {
'weights_gb': weights_gb,
'kv_cache_gb': kv_cache_gb,
'activations_gb': activations_gb,
'total_gb': total_gb,
'fits_on_3090': total_gb < 24.0,
}
# =============================================================================
# HyperionApexEngine
# =============================================================================
class HyperionApexEngine:
"""
Production serving engine for Hyperion Apex V3.
Combines:
• INT4 K-cache + FP8 V-cache
• 6-stage cp.async pipeline with SKP
• WFSA warp specialization
• KVAwareScheduler v2 with hotness-guided prefetch
• Continuous batching
"""
def __init__(self, model, tokenizer,
config: Optional[HyperionApexConfig] = None):
self.config = config or HyperionApexConfig()
self.model = model
self.tokenizer = tokenizer
cfg = self.config