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7473: dual J-K flip-flop

  • Type: flip-flop
  • DIP: 14-pin
  • Number of elements: 2
  • Trigger: Falling edge
  • Asynchronous clear

Description

Provides two J-K negative-edge triggered flip-flops with asynchronous clear function.

Inputs and outputs

Label Description Signal
Jn J input of flip-flop n active high
Kn K input of flip-flop n active high
CLRn asynchronous clear input active low
CLKn clock for flip-flop n negative edge
Qn output of flip-flop n active high
Rn inverted output of flip-flop n active low

Function table

Function CLRn CLKn Jn Kn Qn Rn
asynchronous clear L X X X L H
hold H \ L L qn0 rn0
synchronous clear H \ L H L H
synchronous set H \ H L H L
toggle H \ H H rn0 qn0
no change H H X X qn0 rn0
  • H: HIGH voltage level
  • L: LOW voltage level
  • X: don't care
  • \: negative edge
  • qn0: previous state of output Qn
  • rn0: previous state of output Rn

Pin layout

Datasheets