diff --git a/compiler/plugins/target/AMD-AIE/aie/AIEXToStandard.cpp b/compiler/plugins/target/AMD-AIE/aie/AIEXToStandard.cpp deleted file mode 100644 index f7c53d1fe..000000000 --- a/compiler/plugins/target/AMD-AIE/aie/AIEXToStandard.cpp +++ /dev/null @@ -1,72 +0,0 @@ -// Copyright 2024 The IREE Authors -// -// Licensed under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - -#include "Passes.h" -#include "aie/Dialect/AIEX/IR/AIEXDialect.h" -#include "mlir/Pass/Pass.h" -#include "mlir/Transforms/DialectConversion.h" - -using namespace mlir; -using namespace xilinx; -using namespace xilinx::AIE; -using namespace xilinx::AIEX; - -#define GEN_PASS_DECL_AIEXTOSTANDARD -#include "aie/Dialect/AIEX/Transforms/AIEXPasses.h.inc" -#undef GEN_PASS_DECL_AIEXTOSTANDARD - -#define GEN_PASS_DEF_AIEXTOSTANDARD -#include "aie/Dialect/AIEX/Transforms/AIEXPasses.h.inc" -#undef GEN_PASS_DEF_AIEXTOSTANDARD - -template -struct AIEXOpRemoval : OpConversionPattern { - using OpConversionPattern::OpConversionPattern; - using OpAdaptor = typename MyAIEXOp::Adaptor; - ModuleOp &module; - - AIEXOpRemoval(MLIRContext *context, ModuleOp &m, PatternBenefit benefit = 1) - : OpConversionPattern(context, benefit), module(m) {} - - LogicalResult matchAndRewrite( - MyAIEXOp op, OpAdaptor adaptor, - ConversionPatternRewriter &rewriter) const override { - Operation *Op = op.getOperation(); - rewriter.eraseOp(Op); - return success(); - } -}; - -namespace mlir::iree_compiler::AMDAIE { -struct AIEXToStandardPass : ::impl::AIEXToStandardBase { - void runOnOperation() override { - ModuleOp m = getOperation(); - ConversionTarget target(getContext()); - RewritePatternSet removepatterns(&getContext()); - removepatterns.add>(m.getContext(), m); - removepatterns.add>(m.getContext(), m); - removepatterns.add>(m.getContext(), m); - removepatterns.add>(m.getContext(), m); - removepatterns.add>(m.getContext(), m); - removepatterns.add>(m.getContext(), m); - removepatterns.add>(m.getContext(), m); - removepatterns.add>(m.getContext(), m); - - if (failed(applyPartialConversion(m, target, std::move(removepatterns)))) - signalPassFailure(); - } -}; - -std::unique_ptr> createAIEXToStandardPass() { - return std::make_unique(); -} - -void registerAIEXToStandardPass() { - mlir::registerPass([]() -> std::unique_ptr { - return createAIEXToStandardPass(); - }); -} -} // namespace mlir::iree_compiler::AMDAIE diff --git a/compiler/plugins/target/AMD-AIE/aie/AIEAssignBufferAddressesBasic.cpp b/compiler/plugins/target/AMD-AIE/aie/AMDAIEAssignBufferAddressesBasic.cpp similarity index 69% rename from compiler/plugins/target/AMD-AIE/aie/AIEAssignBufferAddressesBasic.cpp rename to compiler/plugins/target/AMD-AIE/aie/AMDAIEAssignBufferAddressesBasic.cpp index 80778e089..d718586b4 100644 --- a/compiler/plugins/target/AMD-AIE/aie/AIEAssignBufferAddressesBasic.cpp +++ b/compiler/plugins/target/AMD-AIE/aie/AMDAIEAssignBufferAddressesBasic.cpp @@ -10,39 +10,30 @@ #include "mlir/IR/Attributes.h" #include "mlir/Pass/Pass.h" -#define DEBUG_TYPE "aie-assign-buffers-basic" +#define DEBUG_TYPE "amdaie-assign-buffers-basic" using namespace mlir; -using namespace xilinx; using namespace xilinx::AIE; namespace mlir::iree_compiler::AMDAIE { -struct AIEAssignBufferAddressesPassBasic : mlir::OperationPass { +struct AMDAIEAssignBufferAddressesPassBasic : mlir::OperationPass { MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID( - AIEAssignBufferAddressesPassBasic) + AMDAIEAssignBufferAddressesPassBasic) - AIEAssignBufferAddressesPassBasic() + AMDAIEAssignBufferAddressesPassBasic() : mlir::OperationPass(resolveTypeID()) {} - AIEAssignBufferAddressesPassBasic( - const AIEAssignBufferAddressesPassBasic &other) - : mlir::OperationPass(other) {} llvm::StringRef getArgument() const override { - return "aie-assign-buffer-addresses-basic"; + return "amdaie-assign-buffer-addresses-basic"; } llvm::StringRef getName() const override { - return "AIEAssignBufferAddressesBasic"; + return "AMDAIEAssignBufferAddressesBasic"; } std::unique_ptr clonePass() const override { - return std::make_unique( - *static_cast(this)); - } - - void getDependentDialects(DialectRegistry ®istry) const override { - registry.insert(); - registry.insert(); + return std::make_unique( + *static_cast(this)); } void runOnOperation() override { @@ -85,13 +76,13 @@ struct AIEAssignBufferAddressesPassBasic : mlir::OperationPass { }; std::unique_ptr> -createAIEAssignBufferAddressesBasicPass() { - return std::make_unique(); +createAMDAIEAssignBufferAddressesBasicPass() { + return std::make_unique(); } -void registerAIEAssignBufferAddressesBasic() { +void registerAMDAIEAssignBufferAddressesBasic() { mlir::registerPass([]() -> std::unique_ptr { - return createAIEAssignBufferAddressesBasicPass(); + return createAMDAIEAssignBufferAddressesBasicPass(); }); } } // namespace mlir::iree_compiler::AMDAIE diff --git a/compiler/plugins/target/AMD-AIE/aie/AIEAssignBufferDescriptorIDs.cpp b/compiler/plugins/target/AMD-AIE/aie/AMDAIEAssignBufferDescriptorIDs.cpp similarity index 82% rename from compiler/plugins/target/AMD-AIE/aie/AIEAssignBufferDescriptorIDs.cpp rename to compiler/plugins/target/AMD-AIE/aie/AMDAIEAssignBufferDescriptorIDs.cpp index 9f8adfee6..51b273159 100644 --- a/compiler/plugins/target/AMD-AIE/aie/AIEAssignBufferDescriptorIDs.cpp +++ b/compiler/plugins/target/AMD-AIE/aie/AMDAIEAssignBufferDescriptorIDs.cpp @@ -10,7 +10,7 @@ #include "aie/Dialect/AIE/IR/AIEDialect.h" #include "mlir/Pass/Pass.h" -#define DEBUG_TYPE "aie-assign-bd-ids" +#define DEBUG_TYPE "amdaie-assign-bd-ids" #define EVEN_BD_ID_START 0 #define ODD_BD_ID_START 24 @@ -18,14 +18,6 @@ using namespace mlir; using namespace xilinx; using namespace xilinx::AIE; -#define GEN_PASS_DECL_AIEASSIGNBUFFERDESCRIPTORIDS -#include "aie/Dialect/AIE/Transforms/AIEPasses.h.inc" -#undef GEN_PASS_DECL_AIEASSIGNBUFFERDESCRIPTORIDS - -#define GEN_PASS_DEF_AIEASSIGNBUFFERDESCRIPTORIDS -#include "aie/Dialect/AIE/Transforms/AIEPasses.h.inc" -#undef GEN_PASS_DEF_AIEASSIGNBUFFERDESCRIPTORIDS - struct BdIdGenerator { BdIdGenerator(int col, int row, const AIETargetModel &targetModel) : col(col), row(row), isMemTile(targetModel.isMemTile(col, row)) {} @@ -55,9 +47,26 @@ struct BdIdGenerator { namespace mlir::iree_compiler::AMDAIE { -struct AIEAssignBufferDescriptorIDsPass - : ::impl::AIEAssignBufferDescriptorIDsBase< - AIEAssignBufferDescriptorIDsPass> { +struct AMDAIEAssignBufferDescriptorIDsPass : mlir::OperationPass { + MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID( + AMDAIEAssignBufferDescriptorIDsPass) + + AMDAIEAssignBufferDescriptorIDsPass() + : mlir::OperationPass(resolveTypeID()) {} + + llvm::StringRef getArgument() const override { + return "amdaie-assign-bd-ids"; + } + + llvm::StringRef getName() const override { + return "AMDAIEAssignBufferDescriptorIDsPass"; + } + + std::unique_ptr clonePass() const override { + return std::make_unique( + *static_cast(this)); + } + void runOnOperation() override { DeviceOp targetOp = getOperation(); const AIETargetModel &targetModel = targetOp.getTargetModel(); @@ -133,13 +142,13 @@ struct AIEAssignBufferDescriptorIDsPass }; std::unique_ptr> -createAIEAssignBufferDescriptorIDsPass() { - return std::make_unique(); +createAMDAIEAssignBufferDescriptorIDsPass() { + return std::make_unique(); } -void registerAIEAssignBufferDescriptorIDs() { +void registerAMDAIEAssignBufferDescriptorIDs() { mlir::registerPass([]() -> std::unique_ptr { - return createAIEAssignBufferDescriptorIDsPass(); + return createAMDAIEAssignBufferDescriptorIDsPass(); }); } } // namespace mlir::iree_compiler::AMDAIE diff --git a/compiler/plugins/target/AMD-AIE/aie/AIEAssignLockIDs.cpp b/compiler/plugins/target/AMD-AIE/aie/AMDAIEAssignLockIDs.cpp similarity index 80% rename from compiler/plugins/target/AMD-AIE/aie/AIEAssignLockIDs.cpp rename to compiler/plugins/target/AMD-AIE/aie/AMDAIEAssignLockIDs.cpp index b2081b97c..897642fb2 100644 --- a/compiler/plugins/target/AMD-AIE/aie/AIEAssignLockIDs.cpp +++ b/compiler/plugins/target/AMD-AIE/aie/AMDAIEAssignLockIDs.cpp @@ -16,26 +16,27 @@ #include "llvm/ADT/DenseMap.h" #include "mlir/Pass/Pass.h" -#define DEBUG_TYPE "aie-assign-lock-ids" +#define DEBUG_TYPE "amdaie-assign-lock-ids" using namespace mlir; using namespace xilinx; using namespace xilinx::AIE; -#define GEN_PASS_DECL_AIEASSIGNLOCKIDS -#include "aie/Dialect/AIE/Transforms/AIEPasses.h.inc" -#undef GEN_PASS_DECL_AIEASSIGNLOCKIDS +namespace mlir::iree_compiler::AMDAIE { +struct AMDAIEAssignLockIDsPass : mlir::OperationPass { + MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(AMDAIEAssignLockIDsPass) -#define GEN_PASS_DEF_AIEASSIGNLOCKIDS -#include "aie/Dialect/AIE/Transforms/AIEPasses.h.inc" -#undef GEN_PASS_DEF_AIEASSIGNLOCKIDS + AMDAIEAssignLockIDsPass() : mlir::OperationPass(resolveTypeID()) {} -namespace mlir::iree_compiler::AMDAIE { -struct AIEAssignLockIDsPass - : ::impl::AIEAssignLockIDsBase { - void getDependentDialects(DialectRegistry ®istry) const override { - registry.insert(); - registry.insert(); + llvm::StringRef getArgument() const override { + return "amdaie-assign-lock-ids"; + } + + llvm::StringRef getName() const override { return "AMDAIEAssignLockIDsPass"; } + + std::unique_ptr clonePass() const override { + return std::make_unique( + *static_cast(this)); } void runOnOperation() override { @@ -102,13 +103,13 @@ struct AIEAssignLockIDsPass } } }; -std::unique_ptr> createAIEAssignLockIDsPass() { - return std::make_unique(); +std::unique_ptr> createAMDAIEAssignLockIDsPass() { + return std::make_unique(); } -void registerAIEAssignLockIDs() { +void registerAMDAIEAssignLockIDs() { mlir::registerPass([]() -> std::unique_ptr { - return createAIEAssignLockIDsPass(); + return createAMDAIEAssignLockIDsPass(); }); } } // namespace mlir::iree_compiler::AMDAIE diff --git a/compiler/plugins/target/AMD-AIE/aie/AIECoreToStandard.cpp b/compiler/plugins/target/AMD-AIE/aie/AMDAIECoreToStandard.cpp similarity index 79% rename from compiler/plugins/target/AMD-AIE/aie/AIECoreToStandard.cpp rename to compiler/plugins/target/AMD-AIE/aie/AMDAIECoreToStandard.cpp index 975fa6fc7..55a58225c 100644 --- a/compiler/plugins/target/AMD-AIE/aie/AIECoreToStandard.cpp +++ b/compiler/plugins/target/AMD-AIE/aie/AMDAIECoreToStandard.cpp @@ -20,20 +20,14 @@ #include "mlir/Tools/mlir-translate/MlirTranslateMain.h" #include "mlir/Transforms/DialectConversion.h" +#define DEBUG_TYPE "amdaie-standard-lowering" + using namespace mlir; using namespace mlir::vector; using namespace xilinx; using namespace xilinx::AIE; -#define GEN_PASS_DECL_AIECORETOSTANDARD -#include "aie/Dialect/AIE/Transforms/AIEPasses.h.inc" -#undef GEN_PASS_DECL_AIECORETOSTANDARD - -#define GEN_PASS_DEF_AIECORETOSTANDARD -#include "aie/Dialect/AIE/Transforms/AIEPasses.h.inc" -#undef GEN_PASS_DEF_AIECORETOSTANDARD - -struct AIEUseLockToStdLowering : OpConversionPattern { +struct AMDAIEUseLockToStdLowering : OpConversionPattern { using OpConversionPattern::OpConversionPattern; LogicalResult matchAndRewrite( UseLockOp useLock, OpAdaptor adaptor, @@ -72,15 +66,15 @@ struct AIEUseLockToStdLowering : OpConversionPattern { } }; -struct AIEBufferToStandard : OpConversionPattern { +struct AMDAIEBufferToStandard : OpConversionPattern { using OpConversionPattern::OpConversionPattern; ModuleOp &module; // TODO(max): these should be optionals instead of checking against -1 // but the pass itself needs to be updated. int tileCol = 0; int tileRow = 0; - AIEBufferToStandard(MLIRContext *context, ModuleOp &m, int tileCol = -1, - int tileRow = -1) + AMDAIEBufferToStandard(MLIRContext *context, ModuleOp &m, int tileCol = -1, + int tileRow = -1) : OpConversionPattern(context), module(m), tileCol(tileCol), @@ -118,7 +112,8 @@ struct AIEBufferToStandard : OpConversionPattern { return success(); } }; -struct AIECoreToStandardFunc : OpConversionPattern { + +struct AMDAIECoreToStandardFunc : OpConversionPattern { using OpConversionPattern::OpConversionPattern; IRMapping &mapper; // TODO(max): these should be optionals instead of checking against -1 @@ -126,8 +121,8 @@ struct AIECoreToStandardFunc : OpConversionPattern { int tileCol = 0; int tileRow = 0; - AIECoreToStandardFunc(MLIRContext *context, IRMapping &mapper, - int tileCol = 1, int tileRow = 1) + AMDAIECoreToStandardFunc(MLIRContext *context, IRMapping &mapper, + int tileCol = 1, int tileRow = 1) : OpConversionPattern(context), mapper(mapper), tileCol(tileCol), @@ -181,8 +176,41 @@ void outlineOps(DeviceOp device) { } namespace mlir::iree_compiler::AMDAIE { -struct AIECoreToStandardPass - : ::impl::AIECoreToStandardBase { +struct AMDAIECoreToStandardPass : mlir::OperationPass { + MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(AMDAIECoreToStandardPass) + + AMDAIECoreToStandardPass() : mlir::OperationPass(resolveTypeID()) {} + AMDAIECoreToStandardPass(const AMDAIECoreToStandardPass &other) + : mlir::OperationPass(other) {} + + llvm::StringRef getArgument() const override { + return "amdaie-standard-lowering"; + } + + llvm::StringRef getName() const override { + return "AMDAIECoreToStandardPass"; + } + + std::unique_ptr clonePass() const override { + return std::make_unique( + *static_cast(this)); + } + + void getDependentDialects(mlir::DialectRegistry ®istry) const override { + registry.insert(); + registry.insert(); + registry.insert(); + } + + mlir::Pass::Option tileCol{ + *this, "tilecol", + llvm::cl::desc("X coordinate of tile to generate code for"), + llvm::cl::init(-1)}; + mlir::Pass::Option tileRow{ + *this, "tilerow", + llvm::cl::desc("Y coordinate of tile to generate code for"), + llvm::cl::init(-1)}; + void runOnOperation() override { ModuleOp m = getOperation(); OpBuilder builder = OpBuilder::atBlockEnd(m.getBody()); @@ -220,14 +248,14 @@ struct AIECoreToStandardPass buildDecl("llvm.aie2.acquire"); buildDecl("llvm.aie2.release"); - patterns.add(m.getContext()); - patterns.add(m.getContext(), m, tileCol, tileRow); + patterns.add(m.getContext()); + patterns.add(m.getContext(), m, tileCol, tileRow); if (failed(applyPartialConversion(m, target, std::move(patterns)))) return signalPassFailure(); RewritePatternSet outlinePatterns(&getContext()); - outlinePatterns.add(m.getContext(), mapper, tileCol, - tileRow); + outlinePatterns.add(m.getContext(), mapper, + tileCol, tileRow); if (failed(applyPartialConversion(m, target, std::move(outlinePatterns)))) return signalPassFailure(); @@ -243,13 +271,13 @@ struct AIECoreToStandardPass } }; -std::unique_ptr> createAIECoreToStandardPass() { - return std::make_unique(); +std::unique_ptr> createAMDAIECoreToStandardPass() { + return std::make_unique(); } -void registerAIECoreToStandard() { +void registerAMDAIECoreToStandard() { mlir::registerPass([]() -> std::unique_ptr { - return createAIECoreToStandardPass(); + return createAMDAIECoreToStandardPass(); }); } } // namespace mlir::iree_compiler::AMDAIE diff --git a/compiler/plugins/target/AMD-AIE/aie/AIECreatePathFindFlows.cpp b/compiler/plugins/target/AMD-AIE/aie/AMDAIECreatePathFindFlows.cpp similarity index 95% rename from compiler/plugins/target/AMD-AIE/aie/AIECreatePathFindFlows.cpp rename to compiler/plugins/target/AMD-AIE/aie/AMDAIECreatePathFindFlows.cpp index 45e7f1743..5d543e6a3 100644 --- a/compiler/plugins/target/AMD-AIE/aie/AIECreatePathFindFlows.cpp +++ b/compiler/plugins/target/AMD-AIE/aie/AMDAIECreatePathFindFlows.cpp @@ -23,19 +23,11 @@ using namespace mlir; using namespace xilinx; using namespace xilinx::AIE; -#define DEBUG_TYPE "aie-create-pathfinder-flows" +#define DEBUG_TYPE "amdaie-create-pathfinder-flows" #define OVER_CAPACITY_COEFF 0.02 #define USED_CAPACITY_COEFF 0.02 #define DEMAND_COEFF 1.1 -#define GEN_PASS_DECL_AIEROUTEPATHFINDERFLOWS -#include "aie/Dialect/AIE/Transforms/AIEPasses.h.inc" -#undef GEN_PASS_DECL_AIEROUTEPATHFINDERFLOWS - -#define GEN_PASS_DEF_AIEROUTEPATHFINDERFLOWS -#include "aie/Dialect/AIE/Transforms/AIEPasses.h.inc" -#undef GEN_PASS_DEF_AIEROUTEPATHFINDERFLOWS - namespace mlir::iree_compiler::AMDAIE { struct Port { xilinx::AIE::WireBundle bundle; @@ -1128,12 +1120,26 @@ struct ConvertFlowsToInterconnect : OpConversionPattern { /// 3. rewrite flows to stream-switches using 'weights' from analysis pass. /// 4. check a region is legal /// 5. rewrite stream-switches (within a bounding box) back to flows -struct AIEPathfinderPass - : ::impl::AIERoutePathfinderFlowsBase { +struct AMDAIEPathfinderPass : mlir::OperationPass { + MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(AMDAIEPathfinderPass) + + AMDAIEPathfinderPass() : mlir::OperationPass(resolveTypeID()) {} + + llvm::StringRef getArgument() const override { + return "amdaie-create-pathfinder-flows"; + } + + llvm::StringRef getName() const override { return "AMDAIEPathfinderPass"; } + + std::unique_ptr clonePass() const override { + return std::make_unique( + *static_cast(this)); + } + DynamicTileAnalysis analyzer; - AIEPathfinderPass() = default; - AIEPathfinderPass(DynamicTileAnalysis analyzer) - : analyzer(std::move(analyzer)) {} + AMDAIEPathfinderPass(DynamicTileAnalysis analyzer) + : mlir::OperationPass(resolveTypeID()), + analyzer(std::move(analyzer)) {} void runOnOperation() override; @@ -1156,9 +1162,9 @@ struct AIEPathfinderPass SwitchboxOp getSwitchbox(DeviceOp &d, int col, int row); }; -void AIEPathfinderPass::runOnOperation() { +void AMDAIEPathfinderPass::runOnOperation() { // create analysis pass with routing graph for entire device - LLVM_DEBUG(llvm::dbgs() << "---Begin AIEPathfinderPass---\n"); + LLVM_DEBUG(llvm::dbgs() << "---Begin AMDAIEPathfinderPass---\n"); DeviceOp d = getOperation(); if (failed(analyzer.runAnalysis(d))) return signalPassFailure(); @@ -1273,10 +1279,9 @@ void AIEPathfinderPass::runOnOperation() { } } -bool AIEPathfinderPass::attemptFixupMemTileRouting(const OpBuilder &builder, - SwitchboxOp northSwOp, - SwitchboxOp southSwOp, - ConnectOp &problemConnect) { +bool AMDAIEPathfinderPass::attemptFixupMemTileRouting( + const OpBuilder &builder, SwitchboxOp northSwOp, SwitchboxOp southSwOp, + ConnectOp &problemConnect) { int problemNorthChannel; if (problemConnect.getSourceBundle() == WireBundle::North) { problemNorthChannel = problemConnect.getSourceChannel(); @@ -1313,12 +1318,12 @@ bool AIEPathfinderPass::attemptFixupMemTileRouting(const OpBuilder &builder, return false; } -bool AIEPathfinderPass::reconnectConnectOps(const OpBuilder &builder, - SwitchboxOp sw, - ConnectOp problemConnect, - bool isIncomingToSW, - WireBundle problemBundle, - int problemChan, int emptyChan) { +bool AMDAIEPathfinderPass::reconnectConnectOps(const OpBuilder &builder, + SwitchboxOp sw, + ConnectOp problemConnect, + bool isIncomingToSW, + WireBundle problemBundle, + int problemChan, int emptyChan) { bool hasEmptyChannelSlot = true; bool foundCandidateForFixup = false; ConnectOp candidate; @@ -1368,10 +1373,9 @@ bool AIEPathfinderPass::reconnectConnectOps(const OpBuilder &builder, } // Replace connect op -ConnectOp AIEPathfinderPass::replaceConnectOpWithNewDest(OpBuilder builder, - ConnectOp connect, - WireBundle newBundle, - int newChannel) { +ConnectOp AMDAIEPathfinderPass::replaceConnectOpWithNewDest( + OpBuilder builder, ConnectOp connect, WireBundle newBundle, + int newChannel) { builder.setInsertionPoint(connect); auto newOp = builder.create( builder.getUnknownLoc(), connect.getSourceBundle(), @@ -1379,10 +1383,10 @@ ConnectOp AIEPathfinderPass::replaceConnectOpWithNewDest(OpBuilder builder, connect.erase(); return newOp; } -ConnectOp AIEPathfinderPass::replaceConnectOpWithNewSource(OpBuilder builder, - ConnectOp connect, - WireBundle newBundle, - int newChannel) { + +ConnectOp AMDAIEPathfinderPass::replaceConnectOpWithNewSource( + OpBuilder builder, ConnectOp connect, WireBundle newBundle, + int newChannel) { builder.setInsertionPoint(connect); auto newOp = builder.create(builder.getUnknownLoc(), newBundle, newChannel, connect.getDestBundle(), @@ -1391,7 +1395,7 @@ ConnectOp AIEPathfinderPass::replaceConnectOpWithNewSource(OpBuilder builder, return newOp; } -SwitchboxOp AIEPathfinderPass::getSwitchbox(DeviceOp &d, int col, int row) { +SwitchboxOp AMDAIEPathfinderPass::getSwitchbox(DeviceOp &d, int col, int row) { SwitchboxOp output = nullptr; d.walk([&](SwitchboxOp swBox) { if (swBox.colIndex() == col && swBox.rowIndex() == row) { @@ -1401,13 +1405,13 @@ SwitchboxOp AIEPathfinderPass::getSwitchbox(DeviceOp &d, int col, int row) { return output; } -std::unique_ptr> createAIEPathfinderPass() { - return std::make_unique(); +std::unique_ptr> createAMDAIEPathfinderPass() { + return std::make_unique(); } -void registerAIERoutePathfinderFlows() { +void registerAMDAIERoutePathfinderFlows() { mlir::registerPass([]() -> std::unique_ptr { - return createAIEPathfinderPass(); + return createAMDAIEPathfinderPass(); }); } diff --git a/compiler/plugins/target/AMD-AIE/aie/AIEDmaToNpu.cpp b/compiler/plugins/target/AMD-AIE/aie/AMDAIEDmaToNpu.cpp similarity index 94% rename from compiler/plugins/target/AMD-AIE/aie/AIEDmaToNpu.cpp rename to compiler/plugins/target/AMD-AIE/aie/AMDAIEDmaToNpu.cpp index a8f394eea..4cc44796f 100644 --- a/compiler/plugins/target/AMD-AIE/aie/AIEDmaToNpu.cpp +++ b/compiler/plugins/target/AMD-AIE/aie/AMDAIEDmaToNpu.cpp @@ -19,13 +19,7 @@ using namespace xilinx; using namespace xilinx::AIE; using namespace xilinx::AIEX; -#define GEN_PASS_DECL_AIEDMATONPU -#include "aie/Dialect/AIEX/Transforms/AIEXPasses.h.inc" -#undef GEN_PASS_DECL_AIEDMATONPU - -#define GEN_PASS_DEF_AIEDMATONPU -#include "aie/Dialect/AIEX/Transforms/AIEXPasses.h.inc" -#undef GEN_PASS_DEF_AIEDMATONPU +#define DEBUG_TYPE "amdaie-dma-to-npu" #define TXN_OPC_WRITE 0x0 #define TXN_OPC_BLOCKWRITE 0x1 @@ -457,7 +451,26 @@ struct DmaWaitToNpuPattern : OpConversionPattern { }; namespace mlir::iree_compiler::AMDAIE { -struct AIEDmaToNpuPass : ::impl::AIEDmaToNpuBase { +struct AMDAIEDmaToNpuPass : mlir::OperationPass { + MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(AMDAIEDmaToNpuPass) + + AMDAIEDmaToNpuPass() : mlir::OperationPass(resolveTypeID()) {} + + llvm::StringRef getArgument() const override { return "amdaie-dma-to-npu"; } + + llvm::StringRef getName() const override { return "AMDAIEDmaToNpuPass"; } + + std::unique_ptr clonePass() const override { + return std::make_unique( + *static_cast(this)); + } + + void getDependentDialects(::mlir::DialectRegistry ®istry) const override { + registry.insert(); + registry.insert(); + registry.insert(); + } + void runOnOperation() override { ShimDMAllocationGetter cachingGetter; @@ -514,13 +527,13 @@ struct AIEDmaToNpuPass : ::impl::AIEDmaToNpuBase { } }; -std::unique_ptr> createAIEDmaToNpuPass() { - return std::make_unique(); +std::unique_ptr> createAMDAIEDmaToNpuPass() { + return std::make_unique(); } -void registerAIEDmaToNpu() { +void registerAMDAIEDmaToNpu() { mlir::registerPass( - []() -> std::unique_ptr { return createAIEDmaToNpuPass(); }); + []() -> std::unique_ptr { return createAMDAIEDmaToNpuPass(); }); } } // namespace mlir::iree_compiler::AMDAIE diff --git a/compiler/plugins/target/AMD-AIE/aie/AIELocalizeLocks.cpp b/compiler/plugins/target/AMD-AIE/aie/AMDAIELocalizeLocks.cpp similarity index 73% rename from compiler/plugins/target/AMD-AIE/aie/AIELocalizeLocks.cpp rename to compiler/plugins/target/AMD-AIE/aie/AMDAIELocalizeLocks.cpp index 8e96fd798..1e563fc6c 100644 --- a/compiler/plugins/target/AMD-AIE/aie/AIELocalizeLocks.cpp +++ b/compiler/plugins/target/AMD-AIE/aie/AMDAIELocalizeLocks.cpp @@ -9,26 +9,35 @@ #include "mlir/Dialect/Arith/IR/Arith.h" #include "mlir/Pass/Pass.h" -#define DEBUG_TYPE "aie-localize-locks" +#define DEBUG_TYPE "amdaie-localize-locks" using namespace mlir; using namespace xilinx; using namespace xilinx::AIE; -#define GEN_PASS_DECL_AIELOCALIZELOCKS -#include "aie/Dialect/AIE/Transforms/AIEPasses.h.inc" -#undef GEN_PASS_DECL_AIELOCALIZELOCKS +namespace mlir::iree_compiler::AMDAIE { +struct AMDAIELocalizeLocksPass : mlir::OperationPass { + MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(AMDAIELocalizeLocksPass) -#define GEN_PASS_DEF_AIELOCALIZELOCKS -#include "aie/Dialect/AIE/Transforms/AIEPasses.h.inc" -#undef GEN_PASS_DEF_AIELOCALIZELOCKS + AMDAIELocalizeLocksPass() : mlir::OperationPass(resolveTypeID()) {} -namespace mlir::iree_compiler::AMDAIE { -struct AIELocalizeLocksPass - : ::impl::AIELocalizeLocksBase { - void getDependentDialects(DialectRegistry ®istry) const override { - registry.insert(); + llvm::StringRef getArgument() const override { + return "amdaie-localize-locks"; + } + + llvm::StringRef getName() const override { + return " AMDAIELocalizeLocksPass"; + } + + std::unique_ptr clonePass() const override { + return std::make_unique( + *static_cast(this)); + } + + void getDependentDialects(::mlir::DialectRegistry ®istry) const override { + registry.insert(); } + void runOnOperation() override { DeviceOp deviceOp = getOperation(); const auto &targetModel = getTargetModel(deviceOp); @@ -79,13 +88,14 @@ struct AIELocalizeLocksPass } } }; -std::unique_ptr> createAIELocalizeLocksPass() { - return std::make_unique(); + +std::unique_ptr> createAMDAIELocalizeLocksPass() { + return std::make_unique(); } -void registerAIELocalizeLocks() { +void registerAMDAIELocalizeLocks() { mlir::registerPass([]() -> std::unique_ptr { - return createAIELocalizeLocksPass(); + return createAMDAIELocalizeLocksPass(); }); } } // namespace mlir::iree_compiler::AMDAIE diff --git a/compiler/plugins/target/AMD-AIE/aie/AMDAIENormalizeAddressSpaces.cpp b/compiler/plugins/target/AMD-AIE/aie/AMDAIENormalizeAddressSpaces.cpp new file mode 100644 index 000000000..4e26ead7b --- /dev/null +++ b/compiler/plugins/target/AMD-AIE/aie/AMDAIENormalizeAddressSpaces.cpp @@ -0,0 +1,102 @@ +// Copyright 2024 The IREE Authors +// +// Licensed under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + +#include "aie/Dialect/AIE/IR/AIEDialect.h" +#include "mlir/IR/Attributes.h" +#include "mlir/IR/PatternMatch.h" +#include "mlir/Pass/Pass.h" +#include "mlir/Transforms/DialectConversion.h" + +#define DEBUG_TYPE "amdaie-normalize-address-spaces" + +using namespace mlir; +using namespace xilinx; +using namespace xilinx::AIE; + +// prevent collision with aie which doesn't put this in an anon namespace +namespace { + +Type memRefToDefaultAddressSpace(Type t) { + if (auto memRefType = llvm::dyn_cast(t); + memRefType && memRefType.getMemorySpace() != nullptr) + return MemRefType::get(memRefType.getShape(), memRefType.getElementType(), + memRefType.getLayout(), nullptr /* Address Space */); + return t; +} + +#include "aie/Dialect/AIE/Transforms/AIENormalizeAddressSpaces.inc" + +} // namespace + +namespace mlir::iree_compiler::AMDAIE { +struct AMDAIENormalizeAddressSpacesPass : mlir::OperationPass { + MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(AMDAIENormalizeAddressSpacesPass) + + AMDAIENormalizeAddressSpacesPass() + : mlir::OperationPass(resolveTypeID()) {} + + llvm::StringRef getArgument() const override { + return "amdaie-normalize-address-spaces"; + } + + llvm::StringRef getName() const override { + return "AMDAIENormalizeAddressSpacesPass"; + } + + std::unique_ptr clonePass() const override { + return std::make_unique( + *static_cast(this)); + } + + void getDependentDialects(DialectRegistry ®istry) const override { + registry.insert(); + } + + void runOnOperation() override { + DeviceOp device = getOperation(); + + TypeConverter converter; + converter.addConversion([&](Type type) -> std::optional { + return memRefToDefaultAddressSpace(type); + }); + + ConversionTarget target(getContext()); + target.addDynamicallyLegalOp([](memref::GlobalOp op) { + return op.getType().getMemorySpace() == nullptr; + }); + + target.addDynamicallyLegalOp([&](func::FuncOp op) { + return converter.isSignatureLegal(op.getFunctionType()); + }); + + RewritePatternSet patterns(&getContext()); + populateWithGenerated(patterns); + populateFunctionOpInterfaceTypeConversionPattern(patterns, + converter); + + if (failed(applyPartialConversion(device, target, std::move(patterns)))) + signalPassFailure(); + + // Convert any output types to have the default address space + device.walk([&](Operation *op) { + for (Value r : op->getResults()) + r.setType(memRefToDefaultAddressSpace(r.getType())); + }); + } +}; + +std::unique_ptr> +createAMDAIENormalizeAddressSpacesPass() { + return std::make_unique(); +} + +void registerAMDAIENormalizeAddressSpaces() { + mlir::registerPass([]() -> std::unique_ptr { + return createAMDAIENormalizeAddressSpacesPass(); + }); +} + +} // namespace mlir::iree_compiler::AMDAIE \ No newline at end of file diff --git a/compiler/plugins/target/AMD-AIE/aie/AIEObjectFifoStatefulTransform.cpp b/compiler/plugins/target/AMD-AIE/aie/AMDAIEObjectFifoStatefulTransform.cpp similarity index 97% rename from compiler/plugins/target/AMD-AIE/aie/AIEObjectFifoStatefulTransform.cpp rename to compiler/plugins/target/AMD-AIE/aie/AMDAIEObjectFifoStatefulTransform.cpp index 29793f9d9..5a9a255b1 100644 --- a/compiler/plugins/target/AMD-AIE/aie/AIEObjectFifoStatefulTransform.cpp +++ b/compiler/plugins/target/AMD-AIE/aie/AMDAIEObjectFifoStatefulTransform.cpp @@ -27,15 +27,7 @@ using namespace mlir; using namespace xilinx; using namespace xilinx::AIE; -#define GEN_PASS_DECL_AIEOBJECTFIFOSTATEFULTRANSFORM -#include "aie/Dialect/AIE/Transforms/AIEPasses.h.inc" -#undef GEN_PASS_DECL_AIEOBJECTFIFOSTATEFULTRANSFORM - -#define GEN_PASS_DEF_AIEOBJECTFIFOSTATEFULTRANSFORM -#include "aie/Dialect/AIE/Transforms/AIEPasses.h.inc" -#undef GEN_PASS_DEF_AIEOBJECTFIFOSTATEFULTRANSFORM - -#define DEBUG_TYPE "aie-objectFifo-stateful-transform" +#define DEBUG_TYPE "amdaie-objectFifo-stateful-transform" #define LOOP_VAR_DEPENDENCY (-2) @@ -119,9 +111,34 @@ class DMAChannelAnalysis { //===----------------------------------------------------------------------===// namespace mlir::iree_compiler::AMDAIE { -struct AIEObjectFifoStatefulTransformPass - : ::impl::AIEObjectFifoStatefulTransformBase< - AIEObjectFifoStatefulTransformPass> { +struct AMDAIEObjectFifoStatefulTransformPass : mlir::OperationPass { + MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID( + AMDAIEObjectFifoStatefulTransformPass) + + AMDAIEObjectFifoStatefulTransformPass() + : mlir::OperationPass(resolveTypeID()) {} + + llvm::StringRef getArgument() const override { + return "amdaie-objectFifo-stateful-transform"; + } + + llvm::StringRef getName() const override { + return " AMDAIEObjectFifoStatefulTransformPass"; + } + + std::unique_ptr clonePass() const override { + return std::make_unique( + *static_cast(this)); + } + + void getDependentDialects(::mlir::DialectRegistry ®istry) const override { + registry.insert(); + registry.insert(); + registry.insert(); + registry.insert(); + registry.insert(); + } + DenseMap> buffersPerFifo; // maps each objFifo to its corresponding buffer DenseMap> @@ -427,7 +444,7 @@ struct AIEObjectFifoStatefulTransformPass offset, len, succ, dims); } - /// Function that either calls createAIETileDMA(), createShimDMA() or + /// Function that either calls createAMDAIETileDMA(), createShimDMA() or /// createMemTileDMA() based on op tile row value. void createDMA(DeviceOp &device, OpBuilder &builder, ObjectFifoCreateOp op, DMAChannelDir channelDir, int channelIndex, int lockMode, @@ -439,14 +456,14 @@ struct AIEObjectFifoStatefulTransformPass createMemTileDMA(device, builder, op, channelDir, channelIndex, lockMode, dims); } else { - createAIETileDMA(device, builder, op, channelDir, channelIndex, lockMode, + createAMDAIETileDMA(device, builder, op, channelDir, channelIndex, lockMode, dims); } } /// Function used to create a MemOp region with a DMA channel. /// It uses creatBdBlock(), see there for lockMode input. - void createAIETileDMA(DeviceOp &device, OpBuilder &builder, + void createAMDAIETileDMA(DeviceOp &device, OpBuilder &builder, ObjectFifoCreateOp op, DMAChannelDir channelDir, int channelIndex, int lockMode, BDDimLayoutArrayAttr dims) { @@ -1342,14 +1359,15 @@ struct AIEObjectFifoStatefulTransformPass (*it)->erase(); } }; + std::unique_ptr> -createAIEObjectFifoStatefulTransformPass() { - return std::make_unique(); +createAMDAIEObjectFifoStatefulTransformPass() { + return std::make_unique(); } -void registerAIEObjectFifoStatefulTransform() { +void registerAMDAIEObjectFifoStatefulTransform() { mlir::registerPass([]() -> std::unique_ptr { - return createAIEObjectFifoStatefulTransformPass(); + return createAMDAIEObjectFifoStatefulTransformPass(); }); } } // namespace mlir::iree_compiler::AMDAIE diff --git a/compiler/plugins/target/AMD-AIE/aie/AMDAIEXToStandard.cpp b/compiler/plugins/target/AMD-AIE/aie/AMDAIEXToStandard.cpp new file mode 100644 index 000000000..bca74d507 --- /dev/null +++ b/compiler/plugins/target/AMD-AIE/aie/AMDAIEXToStandard.cpp @@ -0,0 +1,89 @@ +// Copyright 2024 The IREE Authors +// +// Licensed under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + +#include "Passes.h" +#include "aie/Dialect/AIEX/IR/AIEXDialect.h" +#include "mlir/Pass/Pass.h" +#include "mlir/Transforms/DialectConversion.h" + +using namespace mlir; +using namespace xilinx; +using namespace xilinx::AIE; +using namespace xilinx::AIEX; + +#define DEBUG_TYPE "amdaiex-standard-lowering" + +template +struct AMDAIEXOpRemoval : OpConversionPattern { + using OpConversionPattern::OpConversionPattern; + using OpAdaptor = typename MyAIEXOp::Adaptor; + ModuleOp &module; + + AMDAIEXOpRemoval(MLIRContext *context, ModuleOp &m, PatternBenefit benefit = 1) + : OpConversionPattern(context, benefit), module(m) {} + + LogicalResult matchAndRewrite( + MyAIEXOp op, OpAdaptor adaptor, + ConversionPatternRewriter &rewriter) const override { + Operation *Op = op.getOperation(); + rewriter.eraseOp(Op); + return success(); + } +}; + +namespace mlir::iree_compiler::AMDAIE { +struct AMDAIEXToStandardPass : mlir::OperationPass { + MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(AMDAIEXToStandardPass) + + AMDAIEXToStandardPass() + : mlir::OperationPass(resolveTypeID()) {} + + llvm::StringRef getArgument() const override { + return "amdaiex-standard-lowering"; + } + + llvm::StringRef getName() const override { return "AMDAIEXToStandardPass"; } + + std::unique_ptr clonePass() const override { + return std::make_unique( + *static_cast(this)); + } + + void getDependentDialects(::mlir::DialectRegistry ®istry) const override { + registry.insert(); + registry.insert(); + registry.insert(); + registry.insert(); + } + + void runOnOperation() override { + ModuleOp m = getOperation(); + ConversionTarget target(getContext()); + RewritePatternSet removepatterns(&getContext()); + removepatterns.add>(m.getContext(), m); + removepatterns.add>(m.getContext(), m); + removepatterns.add>(m.getContext(), m); + removepatterns.add>(m.getContext(), m); + removepatterns.add>(m.getContext(), m); + removepatterns.add>(m.getContext(), m); + removepatterns.add>(m.getContext(), m); + removepatterns.add>(m.getContext(), m); + + if (failed(applyPartialConversion(m, target, std::move(removepatterns)))) + signalPassFailure(); + } +}; + +std::unique_ptr> createAMDAIEXToStandardPass() { + return std::make_unique(); +} + +void registerAMDAIEXToStandardPass() { + mlir::registerPass([]() -> std::unique_ptr { + return createAMDAIEXToStandardPass(); + }); +} +} // namespace mlir::iree_compiler::AMDAIE diff --git a/compiler/plugins/target/AMD-AIE/aie/CMakeLists.txt b/compiler/plugins/target/AMD-AIE/aie/CMakeLists.txt index acd742cee..31a6058ca 100644 --- a/compiler/plugins/target/AMD-AIE/aie/CMakeLists.txt +++ b/compiler/plugins/target/AMD-AIE/aie/CMakeLists.txt @@ -297,22 +297,21 @@ iree_cc_library( NAME AIEPasses SRCS - "AIEAssignBufferAddressesBasic.cpp" - "AIEAssignBufferDescriptorIDs.cpp" - "AIEAssignLockIDs.cpp" - "AIECoreToStandard.cpp" - "AIECreatePathFindFlows.cpp" - "AIELocalizeLocks.cpp" - "AIEObjectFifoStatefulTransform.cpp" - "AIEDmaToNpu.cpp" - "AIEXToStandard.cpp" + "AMDAIEAssignBufferAddressesBasic.cpp" + "AMDAIEAssignBufferDescriptorIDs.cpp" + "AMDAIEAssignLockIDs.cpp" + "AMDAIECoreToStandard.cpp" + "AMDAIECreatePathFindFlows.cpp" + "AMDAIEDmaToNpu.cpp" + "AMDAIELocalizeLocks.cpp" + "AMDAIENormalizeAddressSpaces.cpp" + "AMDAIEObjectFifoStatefulTransform.cpp" + "AMDAIEXToStandard.cpp" DEPS ::defs ::AIEDialectIR - ::AIENormalizeAddressSpacesGen ::AIEXDialectIR - ::AIEXTransformPassesIncGen - ::AIETransformPassesIncGen + ::AIENormalizeAddressSpacesGen ) iree_cc_library( @@ -320,17 +319,24 @@ iree_cc_library( AIEPassesFromMLIRAIE SRCS # Passes needed by AIR-AIE lowering - "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIEObjectFifoStatefulTransform.cpp" - "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIEAssignLockIDs.cpp" - "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIEObjectFifoRegisterProcess.cpp" + # AIE dialect "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIEAssignBufferDescriptorIDs.cpp" - "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIEX/Transforms/AIECreateBroadcastPacket.cpp" + "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIEAssignBuffers.cpp" + "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIEAssignLockIDs.cpp" + "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIECanonicalizeDevice.cpp" + "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIECoreToStandard.cpp" "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIECreatePacketFlows.cpp" + "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIECreatePathFindFlows.cpp" + "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIELocalizeLocks.cpp" "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIENormalizeAddressSpaces.cpp" - "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIECanonicalizeDevice.cpp" + "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIEObjectFifoRegisterProcess.cpp" + "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIEObjectFifoStatefulTransform.cpp" + "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIEPathFinder.cpp" + # AIEX dialect + "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIEX/Transforms/AIECreateBroadcastPacket.cpp" + "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIEX/Transforms/AIEDmaToNpu.cpp" "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIEX/Transforms/AIELowerMulticast.cpp" - "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIEAssignBuffers.cpp" - "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIE/Transforms/AIELocalizeLocks.cpp" + "${IREE_MLIR_AIE_SOURCE_DIR}/lib/Dialect/AIEX/Transforms/AIEXToStandard.cpp" DEPS ::defs ::AIEDialectIR diff --git a/compiler/plugins/target/AMD-AIE/aie/Passes.h b/compiler/plugins/target/AMD-AIE/aie/Passes.h index 5c4dce339..79f6d5309 100644 --- a/compiler/plugins/target/AMD-AIE/aie/Passes.h +++ b/compiler/plugins/target/AMD-AIE/aie/Passes.h @@ -65,30 +65,35 @@ struct TileID { }; std::unique_ptr> -createAIEAssignBufferAddressesBasicPass(); +createAMDAIEAssignBufferAddressesBasicPass(); std::unique_ptr> -createAIEAssignBufferDescriptorIDsPass(); +createAMDAIEAssignBufferDescriptorIDsPass(); std::unique_ptr> -createAIEAssignLockIDsPass(); +createAMDAIEAssignLockIDsPass(); std::unique_ptr> -createAIELocalizeLocksPass(); +createAMDAIELocalizeLocksPass(); std::unique_ptr> -createAIEObjectFifoStatefulTransformPass(); -std::unique_ptr> createAIEPathfinderPass(); -std::unique_ptr> createAIECoreToStandardPass(); -std::unique_ptr> createAIEDmaToNpuPass(); -std::unique_ptr> createAIEXToStandardPass(); - -void registerAIEAssignBufferAddressesBasic(); -void registerAIEAssignBufferDescriptorIDs(); -void registerAIEAssignLockIDs(); -void registerAIECoreToStandard(); -void registerAIELocalizeLocks(); -void registerAIEObjectFifoStatefulTransform(); -void registerAIERoutePathfinderFlows(); - -void registerAIEDmaToNpu(); -void registerAIEXToStandardPass(); +createAMDAIENormalizeAddressSpacesPass(); +std::unique_ptr> +createAMDAIEObjectFifoStatefulTransformPass(); +std::unique_ptr> +createAMDAIEPathfinderPass(); +std::unique_ptr> createAMDAIECoreToStandardPass(); +std::unique_ptr> +createAMDAIEDmaToNpuPass(); +std::unique_ptr> createAMDAIEXToStandardPass(); + +void registerAMDAIEAssignBufferAddressesBasic(); +void registerAMDAIEAssignBufferDescriptorIDs(); +void registerAMDAIEAssignLockIDs(); +void registerAMDAIECoreToStandard(); +void registerAMDAIELocalizeLocks(); +void registerAMDAIENormalizeAddressSpaces(); +void registerAMDAIEObjectFifoStatefulTransform(); +void registerAMDAIERoutePathfinderFlows(); + +void registerAMDAIEDmaToNpu(); +void registerAMDAIEXToStandardPass(); } // namespace mlir::iree_compiler::AMDAIE diff --git a/compiler/plugins/target/AMD-AIE/aie/test/AIE2_cyclostatic_dma.mlir b/compiler/plugins/target/AMD-AIE/aie/test/AIE2_cyclostatic_dma.mlir index e1d59ef9b..5cf17dbba 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/AIE2_cyclostatic_dma.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/AIE2_cyclostatic_dma.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @fifo_cons : memref diff --git a/compiler/plugins/target/AMD-AIE/aie/test/AIE2_cyclostatic_l1.mlir b/compiler/plugins/target/AMD-AIE/aie/test/AIE2_cyclostatic_l1.mlir index 36d4c46bb..8d57fc533 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/AIE2_cyclostatic_l1.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/AIE2_cyclostatic_l1.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @fifo : memref diff --git a/compiler/plugins/target/AMD-AIE/aie/test/AIE2_cyclostatic_l2.mlir b/compiler/plugins/target/AMD-AIE/aie/test/AIE2_cyclostatic_l2.mlir index ecea483a6..df556aff9 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/AIE2_cyclostatic_l2.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/AIE2_cyclostatic_l2.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @fifo1_cons : memref<1xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/AIE2_delayed_release.mlir b/compiler/plugins/target/AMD-AIE/aie/test/AIE2_delayed_release.mlir index 44082c4dd..394fcae06 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/AIE2_delayed_release.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/AIE2_delayed_release.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @fifo : memref diff --git a/compiler/plugins/target/AMD-AIE/aie/test/AIE2_static_l1.mlir b/compiler/plugins/target/AMD-AIE/aie/test/AIE2_static_l1.mlir index d08ee86f7..138668aad 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/AIE2_static_l1.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/AIE2_static_l1.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @fifo : memref diff --git a/compiler/plugins/target/AMD-AIE/aie/test/aiert_insts.mlir b/compiler/plugins/target/AMD-AIE/aie/test/aiert_insts.mlir index dcc666341..7765cbb2f 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/aiert_insts.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/aiert_insts.mlir @@ -1,20 +1,21 @@ -//===- aiert_insts.mlir -----------------------------------------*- MLIR -*-===// -// -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -// (c) Copyright 2023 Advanced Micro Devices, Inc. -// -//===----------------------------------------------------------------------===// +// RUN: iree-opt --amdaie-dma-to-npu %s | FileCheck %s -// RUN: iree-opt --aie-dma-to-npu %s | FileCheck %s -// XFAIL: * -// waiting on catching up to https://github.com/Xilinx/mlir-aie/pull/1559 -// i.e. we're still outputting ddr_id here - -// CHECK: aiex.npu.writebd {bd_id = 1 : i32, buffer_length = 32 : i32, buffer_offset = 0 : i32, column = 0 : i32, d0_size = 0 : i32, d0_stride = 0 : i32, d1_size = 0 : i32, d1_stride = 0 : i32, d2_stride = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_size = 0 : i32, iteration_stride = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, row = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} -// CHECK: aiex.npu.write32 {address = 119300 : ui32, column = 0 : i32, row = 0 : i32, value = 2147483649 : ui32} -// CHECK: aiex.npu.writebd {bd_id = 0 : i32, buffer_length = 32 : i32, buffer_offset = 128 : i32, column = 0 : i32, d0_size = 8 : i32, d0_stride = 0 : i32, d1_size = 2 : i32, d1_stride = 7 : i32, d2_stride = 15 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_size = 0 : i32, iteration_stride = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, row = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} -// CHECK: aiex.npu.write32 {address = 119316 : ui32, column = 0 : i32, row = 0 : i32, value = 0 : ui32} +// CHECK-LABEL: aie.device(npu1_4col) { +// CHECK: memref.global "public" @of_toMem : memref<32xi32> +// CHECK: memref.global "public" @of_fromMem : memref<32xi32> +// CHECK: func.func @sequence(%[[ARG0:.*]]: memref<4x2x8xi32>, %[[ARG1:.*]]: memref<32xi32>, %[[ARG2:.*]]: memref<64xi32>) { +// CHECK: %[[C0_I64:.*]] = arith.constant 0 : i64 +// CHECK: %[[C1_I64:.*]] = arith.constant 1 : i64 +// CHECK: %[[C2_I64:.*]] = arith.constant 2 : i64 +// CHECK: %[[C4_I64:.*]] = arith.constant 4 : i64 +// CHECK: %[[C8_I64:.*]] = arith.constant 8 : i64 +// CHECK: %[[C16_I64:.*]] = arith.constant 16 : i64 +// CHECK: %[[C32_I64:.*]] = arith.constant 32 : i64 +// CHECK: return +// CHECK: } +// CHECK: aie.shim_dma_allocation @of_fromMem(MM2S, 0, 0) +// CHECK: aie.shim_dma_allocation @of_toMem(S2MM, 0, 0) +// CHECK: } {npu_instructions = array} module { aie.device(npu1_4col) { diff --git a/compiler/plugins/target/AMD-AIE/aie/test/aiex_standard_lowering.mlir b/compiler/plugins/target/AMD-AIE/aie/test/aiex_standard_lowering.mlir index edc031c40..3547f6020 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/aiex_standard_lowering.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/aiex_standard_lowering.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aiex-standard-lowering %s | FileCheck %s +// RUN: iree-opt --amdaiex-standard-lowering %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @toMem : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/allocation_info_test.mlir b/compiler/plugins/target/AMD-AIE/aie/test/allocation_info_test.mlir index c7efee118..f63dc8636 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/allocation_info_test.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/allocation_info_test.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @of_out_1_cons : memref<64xi16> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/assign-lockIDs.mlir b/compiler/plugins/target/AMD-AIE/aie/test/assign-lockIDs.mlir index 18da25850..3bcf4ce7b 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/assign-lockIDs.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/assign-lockIDs.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-assign-lock-ids --split-input-file %s | FileCheck %s +// RUN: iree-opt --amdaie-assign-lock-ids --split-input-file %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_2_2:.*]] = aie.tile(2, 2) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/base_test_AIE1.mlir b/compiler/plugins/target/AMD-AIE/aie/test/base_test_AIE1.mlir index ea5dd1ad0..57edf239e 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/base_test_AIE1.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/base_test_AIE1.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @of1_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/base_test_AIE2.mlir b/compiler/plugins/target/AMD-AIE/aie/test/base_test_AIE2.mlir index 27c147164..db86e19c1 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/base_test_AIE2.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/base_test_AIE2.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @of1_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/basic.mlir b/compiler/plugins/target/AMD-AIE/aie/test/basic.mlir index ac8edc0d8..d54043534 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/basic.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/basic.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-assign-bd-ids %s | FileCheck %s +// RUN: iree-opt --amdaie-assign-bd-ids %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: %[[TILE_2_1:.*]] = aie.tile(2, 1) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/basic_alloc_memtile_simple.mlir b/compiler/plugins/target/AMD-AIE/aie/test/basic_alloc_memtile_simple.mlir index 6a94a8060..e86f15ee3 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/basic_alloc_memtile_simple.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/basic_alloc_memtile_simple.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-assign-buffer-addresses-basic %s | FileCheck %s +// RUN: iree-opt --amdaie-assign-buffer-addresses-basic %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: %[[TILE_3_1:.*]] = aie.tile(3, 1) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/basic_alloc_simple.mlir b/compiler/plugins/target/AMD-AIE/aie/test/basic_alloc_simple.mlir index be97fda38..ce5f9fc07 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/basic_alloc_simple.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/basic_alloc_simple.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-assign-buffer-addresses-basic %s | FileCheck %s +// RUN: iree-opt --amdaie-assign-buffer-addresses-basic %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_3_3:.*]] = aie.tile(3, 3) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/broadcast_test.mlir b/compiler/plugins/target/AMD-AIE/aie/test/broadcast_test.mlir index 9406bdb6b..e5712f29d 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/broadcast_test.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/broadcast_test.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @broadcast_of_0_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/cyclostatic_AIE2_sharedMem.mlir b/compiler/plugins/target/AMD-AIE/aie/test/cyclostatic_AIE2_sharedMem.mlir index 11be73c1d..48c48ab95 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/cyclostatic_AIE2_sharedMem.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/cyclostatic_AIE2_sharedMem.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @fifo0 : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/dma_to_npu.mlir b/compiler/plugins/target/AMD-AIE/aie/test/dma_to_npu.mlir index 8c07e0afc..09340de74 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/dma_to_npu.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/dma_to_npu.mlir @@ -1,24 +1,15 @@ -// RUN: iree-opt --split-input-file --aie-dma-to-npu %s | FileCheck %s -// XFAIL: * -// waiting on catching up to https://github.com/Xilinx/mlir-aie/pull/1559 -// i.e. we're still outputting ddr_id here +// RUN: iree-opt --split-input-file --amdaie-dma-to-npu %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @toMem : memref<16xi32> // CHECK: memref.global "public" @fromMem : memref<16xi32> // CHECK: func.func @dma_memcpy_nd_0(%[[ARG0:.*]]: memref<16xi32>, %[[ARG1:.*]]: memref<16xi32>) { -// CHECK: aiex.npu.writebd {bd_id = 1 : i32, buffer_length = 256 : i32, buffer_offset = 0 : i32, column = 0 : i32, d0_size = 16 : i32, d0_stride = 0 : i32, d1_size = 0 : i32, d1_stride = 63 : i32, d2_stride = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_size = 0 : i32, iteration_stride = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, row = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} -// CHECK: aiex.npu.address_patch {addr = 118820 : ui32, arg_idx = 0 : i32, arg_plus = 0 : i32} -// CHECK: aiex.npu.write32 {address = 119300 : ui32, column = 0 : i32, row = 0 : i32, value = 2147483649 : ui32} -// CHECK: aiex.npu.writebd {bd_id = 0 : i32, buffer_length = 256 : i32, buffer_offset = 64 : i32, column = 0 : i32, d0_size = 16 : i32, d0_stride = 0 : i32, d1_size = 0 : i32, d1_stride = 63 : i32, d2_stride = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_size = 0 : i32, iteration_stride = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, row = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} -// CHECK: aiex.npu.address_patch {addr = 118788 : ui32, arg_idx = 1 : i32, arg_plus = 64 : i32} -// CHECK: aiex.npu.write32 {address = 119316 : ui32, column = 0 : i32, row = 0 : i32, value = 0 : ui32} // CHECK: return // CHECK: } // CHECK: aie.shim_dma_allocation @fromMem(MM2S, 0, 0) // CHECK: aie.shim_dma_allocation @toMem(S2MM, 0, 0) -// CHECK: } +// CHECK: } {npu_instructions = array} module { aie.device(npu1_4col) { @@ -39,14 +30,10 @@ module { // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @toMem : memref<16xi32> // CHECK: func.func @dma_wait_s2mm(%[[ARG0:.*]]: memref<16xi32>, %[[ARG1:.*]]: memref<16xi32>) { -// CHECK: aiex.npu.writebd {bd_id = 1 : i32, buffer_length = 256 : i32, buffer_offset = 0 : i32, column = 0 : i32, d0_size = 16 : i32, d0_stride = 0 : i32, d1_size = 0 : i32, d1_stride = 63 : i32, d2_stride = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_size = 0 : i32, iteration_stride = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, row = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} -// CHECK: aiex.npu.address_patch {addr = 118820 : ui32, arg_idx = 0 : i32, arg_plus = 0 : i32} -// CHECK: aiex.npu.write32 {address = 119300 : ui32, column = 0 : i32, row = 0 : i32, value = 2147483649 : ui32} -// CHECK: aiex.npu.sync {channel = 0 : i32, column = 0 : i32, column_num = 1 : i32, direction = 0 : i32, row = 0 : i32, row_num = 1 : i32} // CHECK: return // CHECK: } // CHECK: aie.shim_dma_allocation @toMem(S2MM, 0, 0) -// CHECK: } +// CHECK: } {npu_instructions = array} module { aie.device(npu1_4col) { @@ -65,14 +52,10 @@ module { // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @toMem : memref<16xi32> // CHECK: func.func @dma_wait_mm2s(%[[ARG0:.*]]: memref<16xi32>, %[[ARG1:.*]]: memref<16xi32>) { -// CHECK: aiex.npu.writebd {bd_id = 1 : i32, buffer_length = 256 : i32, buffer_offset = 0 : i32, column = 1 : i32, d0_size = 16 : i32, d0_stride = 0 : i32, d1_size = 0 : i32, d1_stride = 63 : i32, d2_stride = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_size = 0 : i32, iteration_stride = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, row = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} -// CHECK: aiex.npu.address_patch {addr = 33673252 : ui32, arg_idx = 0 : i32, arg_plus = 0 : i32} -// CHECK: aiex.npu.write32 {address = 119324 : ui32, column = 1 : i32, row = 0 : i32, value = 1 : ui32} -// CHECK: aiex.npu.sync {channel = 1 : i32, column = 1 : i32, column_num = 1 : i32, direction = 1 : i32, row = 0 : i32, row_num = 1 : i32} // CHECK: return // CHECK: } // CHECK: aie.shim_dma_allocation @toMem(MM2S, 1, 1) -// CHECK: } +// CHECK: } {npu_instructions = array} module { aie.device(npu1_4col) { diff --git a/compiler/plugins/target/AMD-AIE/aie/test/dma_to_npu_issue_token.mlir b/compiler/plugins/target/AMD-AIE/aie/test/dma_to_npu_issue_token.mlir index 2b6484289..6fc4f6261 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/dma_to_npu_issue_token.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/dma_to_npu_issue_token.mlir @@ -1,24 +1,15 @@ -// RUN: iree-opt --aie-dma-to-npu %s | FileCheck %s -// XFAIL: * -// waiting on catching up to https://github.com/Xilinx/mlir-aie/pull/1559 -// i.e. we're still outputting ddr_id here +// RUN: iree-opt --amdaie-dma-to-npu %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @toMem : memref<16xi32> // CHECK: memref.global "public" @fromMem : memref<16xi32> // CHECK: func.func @test1(%[[ARG0:.*]]: memref<16xi32>, %[[ARG1:.*]]: memref<16xi32>) { -// CHECK: aiex.npu.writebd {bd_id = 1 : i32, buffer_length = 256 : i32, buffer_offset = 0 : i32, column = 0 : i32, d0_size = 16 : i32, d0_stride = 0 : i32, d1_size = 0 : i32, d1_stride = 63 : i32, d2_stride = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_size = 0 : i32, iteration_stride = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, row = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} -// CHECK: aiex.npu.address_patch {addr = 118820 : ui32, arg_idx = 0 : i32, arg_plus = 0 : i32} -// CHECK: aiex.npu.write32 {address = 119300 : ui32, column = 0 : i32, row = 0 : i32, value = 2147483649 : ui32} -// CHECK: aiex.npu.writebd {bd_id = 0 : i32, buffer_length = 256 : i32, buffer_offset = 64 : i32, column = 0 : i32, d0_size = 16 : i32, d0_stride = 0 : i32, d1_size = 0 : i32, d1_stride = 63 : i32, d2_stride = 0 : i32, enable_packet = 0 : i32, iteration_current = 0 : i32, iteration_size = 0 : i32, iteration_stride = 0 : i32, lock_acq_enable = 0 : i32, lock_acq_id = 0 : i32, lock_acq_val = 0 : i32, lock_rel_id = 0 : i32, lock_rel_val = 0 : i32, next_bd = 0 : i32, out_of_order_id = 0 : i32, packet_id = 0 : i32, packet_type = 0 : i32, row = 0 : i32, use_next_bd = 0 : i32, valid_bd = 1 : i32} -// CHECK: aiex.npu.address_patch {addr = 118788 : ui32, arg_idx = 1 : i32, arg_plus = 64 : i32} -// CHECK: aiex.npu.write32 {address = 119316 : ui32, column = 0 : i32, row = 0 : i32, value = 0 : ui32} // CHECK: return // CHECK: } // CHECK: aie.shim_dma_allocation @fromMem(MM2S, 0, 0) // CHECK: aie.shim_dma_allocation @toMem(S2MM, 0, 0) -// CHECK: } +// CHECK: } {npu_instructions = array} module { aie.device(npu1_4col) { diff --git a/compiler/plugins/target/AMD-AIE/aie/test/link_test_AIE1.mlir b/compiler/plugins/target/AMD-AIE/aie/test/link_test_AIE1.mlir index b6eff0457..792b337af 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/link_test_AIE1.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/link_test_AIE1.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @of2_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/link_test_AIE2.mlir b/compiler/plugins/target/AMD-AIE/aie/test/link_test_AIE2.mlir index b161ac334..bf14b9dfb 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/link_test_AIE2.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/link_test_AIE2.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @mem_out_cons : memref<3000xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/link_test_DDR_to_L1.mlir b/compiler/plugins/target/AMD-AIE/aie/test/link_test_DDR_to_L1.mlir index 2c79e6644..9f22e5594 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/link_test_DDR_to_L1.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/link_test_DDR_to_L1.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @from_memTile_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/link_test_L1_to_DDR.mlir b/compiler/plugins/target/AMD-AIE/aie/test/link_test_L1_to_DDR.mlir index 47c7127f7..ec61dc832 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/link_test_L1_to_DDR.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/link_test_L1_to_DDR.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @from_memTile_cons : memref<48xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/link_test_broadcast.mlir b/compiler/plugins/target/AMD-AIE/aie/test/link_test_broadcast.mlir index 80b0fb5cd..6a01f7e64 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/link_test_broadcast.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/link_test_broadcast.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @skip_connection_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/link_test_distribute.mlir b/compiler/plugins/target/AMD-AIE/aie/test/link_test_distribute.mlir index b051eca67..8b1f7be40 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/link_test_distribute.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/link_test_distribute.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @link4_cons : memref<12xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/link_test_join.mlir b/compiler/plugins/target/AMD-AIE/aie/test/link_test_join.mlir index f417f8ab9..407821dd8 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/link_test_join.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/link_test_join.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @link5_cons : memref<512xi8> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/local_locks.mlir b/compiler/plugins/target/AMD-AIE/aie/test/local_locks.mlir index e83d29ac5..07082bf67 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/local_locks.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/local_locks.mlir @@ -1,4 +1,4 @@ -// RUN: iree-opt --aie-standard-lowering %s | FileCheck %s +// RUN: iree-opt --amdaie-standard-lowering %s | FileCheck %s // CHECK-LABEL: func.func @core_3_3() { // CHECK: %[[C56:.*]] = arith.constant 56 : index diff --git a/compiler/plugins/target/AMD-AIE/aie/test/locks1.mlir b/compiler/plugins/target/AMD-AIE/aie/test/locks1.mlir index 6c9f6376e..de5cee855 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/locks1.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/locks1.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-localize-locks %s | FileCheck %s +// RUN: iree-opt --amdaie-localize-locks %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_1_1:.*]] = aie.tile(1, 1) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/loop_test.aie.mlir b/compiler/plugins/target/AMD-AIE/aie/test/loop_test.aie.mlir index a1dbcd9e8..0a345376c 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/loop_test.aie.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/loop_test.aie.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @loop_of : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/loop_test_nested.mlir b/compiler/plugins/target/AMD-AIE/aie/test/loop_test_nested.mlir index 781a65135..0de536991 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/loop_test_nested.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/loop_test_nested.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @loop_of : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/lower_buffer.mlir b/compiler/plugins/target/AMD-AIE/aie/test/lower_buffer.mlir index ac75b7513..f7951a6f9 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/lower_buffer.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/lower_buffer.mlir @@ -1,4 +1,4 @@ -// RUN: iree-opt --aie-standard-lowering %s | FileCheck %s +// RUN: iree-opt --amdaie-standard-lowering %s | FileCheck %s // CHECK: memref.global "public" @a : memref<4xi32> // CHECK-LABEL: func.func @core_4_3() { diff --git a/compiler/plugins/target/AMD-AIE/aie/test/lower_buffer_and_lock.mlir b/compiler/plugins/target/AMD-AIE/aie/test/lower_buffer_and_lock.mlir index 2db98fed3..c35439085 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/lower_buffer_and_lock.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/lower_buffer_and_lock.mlir @@ -1,4 +1,4 @@ -// RUN: iree-opt --aie-localize-locks --aie-standard-lowering %s | FileCheck %s +// RUN: iree-opt --amdaie-localize-locks --amdaie-standard-lowering %s | FileCheck %s // CHECK-LABEL: memref.global "public" @a : memref<256xi32> // CHECK-LABEL: func.func @core_1_3() { diff --git a/compiler/plugins/target/AMD-AIE/aie/test/lower_dma.mlir b/compiler/plugins/target/AMD-AIE/aie/test/lower_dma.mlir index 01f7ff8e7..6950cbd20 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/lower_dma.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/lower_dma.mlir @@ -1,4 +1,4 @@ -// RUN: iree-opt --aie-localize-locks --aie-standard-lowering %s | FileCheck %s +// RUN: iree-opt --amdaie-localize-locks --amdaie-standard-lowering %s | FileCheck %s // CHECK: func.func private @llvm.aie2.put.ms(i32, i32) // CHECK: func.func private @llvm.aie2.mcd.write.vec(vector<16xi32>, i32) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/lower_event.mlir b/compiler/plugins/target/AMD-AIE/aie/test/lower_event.mlir index 35ffaf28e..02f529b4c 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/lower_event.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/lower_event.mlir @@ -1,4 +1,4 @@ -// RUN: iree-opt --aie-standard-lowering %s | FileCheck %s +// RUN: iree-opt --amdaie-standard-lowering %s | FileCheck %s // XFAIL: * // event not supported for aie2? diff --git a/compiler/plugins/target/AMD-AIE/aie/test/lower_stream.mlir b/compiler/plugins/target/AMD-AIE/aie/test/lower_stream.mlir index 1509ede63..25f5941b1 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/lower_stream.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/lower_stream.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-standard-lowering %s | FileCheck %s +// RUN: iree-opt --amdaie-standard-lowering %s | FileCheck %s // CHECK-LABEL: func.func private @llvm.aie2.get.ss() -> (i32, i32) // CHECK: func.func private @llvm.aie2.scd.read.vec(i32) -> vector<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/matmul_test.mlir b/compiler/plugins/target/AMD-AIE/aie/test/matmul_test.mlir index 35386a828..0ce5575bc 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/matmul_test.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/matmul_test.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @outC_cons : memref<16x16xi16> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/memTile_test.mlir b/compiler/plugins/target/AMD-AIE/aie/test/memTile_test.mlir index c86482a82..c97a59633 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/memTile_test.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/memTile_test.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @of_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/nd_dma_base_AIE2.mlir b/compiler/plugins/target/AMD-AIE/aie/test/nd_dma_base_AIE2.mlir index cf2890344..612b452de 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/nd_dma_base_AIE2.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/nd_dma_base_AIE2.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @of1_cons : memref<256xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/nd_dma_distribute_AIE2.mlir b/compiler/plugins/target/AMD-AIE/aie/test/nd_dma_distribute_AIE2.mlir index cf52624ab..1038dfee1 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/nd_dma_distribute_AIE2.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/nd_dma_distribute_AIE2.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @of2_cons : memref<128xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/nd_dma_multiple_consumers_AIE2.mlir b/compiler/plugins/target/AMD-AIE/aie/test/nd_dma_multiple_consumers_AIE2.mlir index 6d7050116..d51f75ca2 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/nd_dma_multiple_consumers_AIE2.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/nd_dma_multiple_consumers_AIE2.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @of3_cons : memref<256xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/nested_loop_test.mlir b/compiler/plugins/target/AMD-AIE/aie/test/nested_loop_test.mlir index c1b492839..06c8682f3 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/nested_loop_test.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/nested_loop_test.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @in8_cons : memref<32x32xi32, 1> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/non_adjacency_test_1.mlir b/compiler/plugins/target/AMD-AIE/aie/test/non_adjacency_test_1.mlir index 496a2b8c5..a308d057f 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/non_adjacency_test_1.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/non_adjacency_test_1.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @objfifo_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/non_adjacency_test_2.mlir b/compiler/plugins/target/AMD-AIE/aie/test/non_adjacency_test_2.mlir index 78e927e61..0ed6a3f26 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/non_adjacency_test_2.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/non_adjacency_test_2.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @objfifo_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/non_adjacency_test_AIE2.mlir b/compiler/plugins/target/AMD-AIE/aie/test/non_adjacency_test_AIE2.mlir index 07aaba180..53a47fc9f 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/non_adjacency_test_AIE2.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/non_adjacency_test_AIE2.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @of_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/normalize_call_op.mlir b/compiler/plugins/target/AMD-AIE/aie/test/normalize_call_op.mlir new file mode 100644 index 000000000..53d74cb85 --- /dev/null +++ b/compiler/plugins/target/AMD-AIE/aie/test/normalize_call_op.mlir @@ -0,0 +1,22 @@ +// RUN: iree-opt %s -amdaie-normalize-address-spaces | FileCheck %s +// CHECK: memref.global "public" @buffer : memref<1024xi32> +// CHECK: %[[VAL_0:.*]] = memref.get_global @buffer : memref<1024xi32> +// CHECK: memref.assume_alignment %[[VAL_0]], 32 : memref<1024xi32> +// CHECK: call @external_function(%[[VAL_0]]) : (memref<1024xi32>) -> () +// CHECK: func.func private @external_function(memref<1024xi32>) +module @aie attributes {llvm.target_triple = "aie"} { + aie.device(xcvc1902) { + memref.global "public" @buffer : memref<1024xi32, 2> + func.func @coreXY() { + %0 = memref.get_global @buffer : memref<1024xi32, 2> + memref.assume_alignment %0, 32 : memref<1024xi32, 2> + aie.next_bd ^bb1 + ^bb1: // pred: ^bb0 + aie.next_bd ^bb2 + ^bb2: // pred: ^bb1 + call @external_function(%0) : (memref<1024xi32, 2>) -> () + return + } + func.func private @external_function(memref<1024xi32, 2>) + } +} \ No newline at end of file diff --git a/compiler/plugins/target/AMD-AIE/aie/test/push_to_queue.mlir b/compiler/plugins/target/AMD-AIE/aie/test/push_to_queue.mlir index cbab26092..3c20553ff 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/push_to_queue.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/push_to_queue.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-dma-to-npu %s | FileCheck %s +// RUN: iree-opt --amdaie-dma-to-npu %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: func.func @sequence() { diff --git a/compiler/plugins/target/AMD-AIE/aie/test/register_external_buffers_test.mlir b/compiler/plugins/target/AMD-AIE/aie/test/register_external_buffers_test.mlir index 56f3ea883..79f8a4973 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/register_external_buffers_test.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/register_external_buffers_test.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @ext_of_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/same_core_producer_consumer_test.mlir b/compiler/plugins/target/AMD-AIE/aie/test/same_core_producer_consumer_test.mlir index 5ad514d11..e8e9e157b 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/same_core_producer_consumer_test.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/same_core_producer_consumer_test.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @of : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/shimRow_mem_test.mlir b/compiler/plugins/target/AMD-AIE/aie/test/shimRow_mem_test.mlir index 89b67bb3b..ba6424377 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/shimRow_mem_test.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/shimRow_mem_test.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @objfifo_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/shim_AIE2_test.mlir b/compiler/plugins/target/AMD-AIE/aie/test/shim_AIE2_test.mlir index 3c8397557..b84ef1636 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/shim_AIE2_test.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/shim_AIE2_test.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @of_out_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/shim_broadcast_test.mlir b/compiler/plugins/target/AMD-AIE/aie/test/shim_broadcast_test.mlir index 57b4cd3ca..6b0e20811 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/shim_broadcast_test.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/shim_broadcast_test.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @of_in_0_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/subview_test_1.mlir b/compiler/plugins/target/AMD-AIE/aie/test/subview_test_1.mlir index eda95990b..7e9c2a9e1 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/subview_test_1.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/subview_test_1.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @objfifo : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/subview_test_2.mlir b/compiler/plugins/target/AMD-AIE/aie/test/subview_test_2.mlir index d2804e51a..14aa671df 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/subview_test_2.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/subview_test_2.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @of2 : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/subview_test_3.mlir b/compiler/plugins/target/AMD-AIE/aie/test/subview_test_3.mlir index 01fe48051..878282247 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/subview_test_3.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/subview_test_3.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @of2 : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/tileDMA_test.mlir b/compiler/plugins/target/AMD-AIE/aie/test/tileDMA_test.mlir index 808018e5a..e6913470d 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/tileDMA_test.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/tileDMA_test.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(npu1_4col) { // CHECK: memref.global "public" @objfifo_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_broadcast.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_broadcast.mlir index afd7c6a54..b6cf2cafb 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_broadcast.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_broadcast.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_0_3:.*]] = aie.tile(0, 3) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_fixed_connections.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_fixed_connections.mlir index aad54dea2..0c278bda2 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_fixed_connections.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_fixed_connections.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows --split-input-file %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows --split-input-file %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_2_0:.*]] = aie.tile(2, 0) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_flow_test_1.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_flow_test_1.mlir index f94d1995f..180e4e595 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_flow_test_1.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_flow_test_1.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_2_0:.*]] = aie.tile(2, 0) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_flow_test_2.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_flow_test_2.mlir index 9b42d358f..0dc0a6250 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_flow_test_2.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_flow_test_2.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_0_1:.*]] = aie.tile(0, 1) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_flow_test_3.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_flow_test_3.mlir index 2e162549d..5e858f76f 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_flow_test_3.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_flow_test_3.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_0_1:.*]] = aie.tile(0, 1) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_many_flows.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_many_flows.mlir index ec30373ad..d9447f90a 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_many_flows.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_many_flows.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_0_2:.*]] = aie.tile(0, 2) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_many_flows2.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_many_flows2.mlir index ab6ac0aa0..301844d42 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_many_flows2.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_many_flows2.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_0_2:.*]] = aie.tile(0, 2) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_memtile.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_memtile.mlir index 3af08e130..3ca58ae9c 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_memtile.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_memtile.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2802) { // CHECK: %[[TILE_0_4:.*]] = aie.tile(0, 4) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_memtile_routing_constraints.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_memtile_routing_constraints.mlir index 76d4286a5..c4d66e5cf 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_memtile_routing_constraints.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_memtile_routing_constraints.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2802) { // CHECK: %[[TILE_2_0:.*]] = aie.tile(2, 0) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_mmult.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_mmult.mlir index e226f36fb..9b1287862 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_mmult.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_mmult.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_7_1:.*]] = aie.tile(7, 1) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_more_flows_shim.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_more_flows_shim.mlir index 3e87bc19f..33234057c 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_more_flows_shim.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_more_flows_shim.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --split-input-file --aie-create-pathfinder-flows -split-input-file %s | FileCheck %s +// RUN: iree-opt --split-input-file --amdaie-create-pathfinder-flows -split-input-file %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_7_0:.*]] = aie.tile(7, 0) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_over_flows.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_over_flows.mlir index 4c63f1dc3..b2c9b6e7b 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_over_flows.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_over_flows.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_0_3:.*]] = aie.tile(0, 3) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_routed_herd_3x1.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_routed_herd_3x1.mlir index 329bc2078..2447b0b5a 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_routed_herd_3x1.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_routed_herd_3x1.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_0_0:.*]] = aie.tile(0, 0) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_routed_herd_3x2.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_routed_herd_3x2.mlir index 5fe7af528..5c8f5a9e6 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_routed_herd_3x2.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_routed_herd_3x2.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_0_0:.*]] = aie.tile(0, 0) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_simple.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_simple.mlir index e5e1fdfaa..dd47270aa 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_simple.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_simple.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_0_1:.*]] = aie.tile(0, 1) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_simple2.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_simple2.mlir index e29007154..3551ddea1 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_simple2.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_simple2.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_2_3:.*]] = aie.tile(2, 3) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_simple_flows.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_simple_flows.mlir index 13a8541e2..a47a4197a 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_simple_flows.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_simple_flows.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_2_3:.*]] = aie.tile(2, 3) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_simple_flows2.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_simple_flows2.mlir index b25fc9439..6baa2d1d4 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_simple_flows2.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_simple_flows2.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_2_3:.*]] = aie.tile(2, 3) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_simple_flows_shim.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_simple_flows_shim.mlir index 2daad27b7..3d39379ed 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_simple_flows_shim.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_simple_flows_shim.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --split-input-file --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --split-input-file --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_2_1:.*]] = aie.tile(2, 1) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/unit_vecmul_4x4.mlir b/compiler/plugins/target/AMD-AIE/aie/test/unit_vecmul_4x4.mlir index 43fc956f8..aae1b17d6 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/unit_vecmul_4x4.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/unit_vecmul_4x4.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-create-pathfinder-flows %s | FileCheck %s +// RUN: iree-opt --amdaie-create-pathfinder-flows %s | FileCheck %s // CHECK-LABEL: aie.device(xcvc1902) { // CHECK: %[[TILE_47_2:.*]] = aie.tile(47, 2) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/useLock_in_func.mlir b/compiler/plugins/target/AMD-AIE/aie/test/useLock_in_func.mlir index 90846efc7..210a460c7 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/useLock_in_func.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/useLock_in_func.mlir @@ -1,4 +1,4 @@ -// RUN: iree-opt --aie-localize-locks --aie-standard-lowering %s | FileCheck %s +// RUN: iree-opt --amdaie-localize-locks --amdaie-standard-lowering %s | FileCheck %s // CHECK-LABEL: module @test attributes {llvm.target_triple = "aie2"} { // CHECK-LABEL: func.func private @kernel( diff --git a/compiler/plugins/target/AMD-AIE/aie/test/user_assigned.mlir b/compiler/plugins/target/AMD-AIE/aie/test/user_assigned.mlir index 79e08f0cb..6272e334b 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/user_assigned.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/user_assigned.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-assign-bd-ids --split-input-file %s | FileCheck %s +// RUN: iree-opt --amdaie-assign-bd-ids --split-input-file %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: %[[TILE_2_1:.*]] = aie.tile(2, 1) diff --git a/compiler/plugins/target/AMD-AIE/aie/test/via_DMA_test.mlir b/compiler/plugins/target/AMD-AIE/aie/test/via_DMA_test.mlir index 76d76e700..935698c9b 100644 --- a/compiler/plugins/target/AMD-AIE/aie/test/via_DMA_test.mlir +++ b/compiler/plugins/target/AMD-AIE/aie/test/via_DMA_test.mlir @@ -1,5 +1,5 @@ -// RUN: iree-opt --aie-objectFifo-stateful-transform %s | FileCheck %s +// RUN: iree-opt --amdaie-objectFifo-stateful-transform %s | FileCheck %s // CHECK-LABEL: aie.device(xcve2302) { // CHECK: memref.global "public" @of_stream_cons : memref<16xi32> diff --git a/compiler/plugins/target/AMD-AIE/iree-amd-aie/PluginRegistration.cpp b/compiler/plugins/target/AMD-AIE/iree-amd-aie/PluginRegistration.cpp index 5a2e72e88..70ce1e74e 100644 --- a/compiler/plugins/target/AMD-AIE/iree-amd-aie/PluginRegistration.cpp +++ b/compiler/plugins/target/AMD-AIE/iree-amd-aie/PluginRegistration.cpp @@ -5,7 +5,9 @@ // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception #include "aie/Dialect/AIE/IR/AIEDialect.h" +#include "aie/Dialect/AIE/Transforms/AIEPasses.h" #include "aie/Dialect/AIEX/IR/AIEXDialect.h" +#include "aie/Dialect/AIEX/Transforms/AIEXPasses.h" #include "air/Dialect/AIR/AIRDialect.h" #include "air/Passes.h" #include "iree-amd-aie/IR/AMDAIEDialect.h" @@ -18,15 +20,16 @@ namespace mlir::iree_compiler { namespace AMDAIE { -extern void registerAIEAssignBufferAddressesBasic(); -extern void registerAIEAssignBufferDescriptorIDs(); -extern void registerAIEAssignLockIDs(); -extern void registerAIECoreToStandard(); -extern void registerAIELocalizeLocks(); -extern void registerAIEObjectFifoStatefulTransform(); -extern void registerAIERoutePathfinderFlows(); -extern void registerAIEDmaToNpu(); -extern void registerAIEXToStandardPass(); +extern void registerAMDAIEAssignBufferAddressesBasic(); +extern void registerAMDAIEAssignBufferDescriptorIDs(); +extern void registerAMDAIEAssignLockIDs(); +extern void registerAMDAIECoreToStandard(); +extern void registerAMDAIELocalizeLocks(); +extern void registerAMDAIENormalizeAddressSpaces(); +extern void registerAMDAIEObjectFifoStatefulTransform(); +extern void registerAMDAIERoutePathfinderFlows(); +extern void registerAMDAIEDmaToNpu(); +extern void registerAMDAIEXToStandardPass(); } // namespace AMDAIE namespace { @@ -36,17 +39,29 @@ struct AMDAIESession PluginActivationPolicy::DefaultActivated> { static void registerPasses() { AMDAIE::registerAMDAIEPasses(); - AMDAIE::registerAIEAssignBufferAddressesBasic(); - AMDAIE::registerAIEAssignBufferDescriptorIDs(); - AMDAIE::registerAIEAssignLockIDs(); - AMDAIE::registerAIECoreToStandard(); - AMDAIE::registerAIELocalizeLocks(); - AMDAIE::registerAIEObjectFifoStatefulTransform(); - AMDAIE::registerAIERoutePathfinderFlows(); - AMDAIE::registerAIEDmaToNpu(); - AMDAIE::registerAIEXToStandardPass(); + AMDAIE::registerAMDAIEAssignBufferAddressesBasic(); + AMDAIE::registerAMDAIEAssignBufferDescriptorIDs(); + AMDAIE::registerAMDAIEAssignLockIDs(); + AMDAIE::registerAMDAIECoreToStandard(); + AMDAIE::registerAMDAIELocalizeLocks(); + AMDAIE::registerAMDAIENormalizeAddressSpaces(); + AMDAIE::registerAMDAIEObjectFifoStatefulTransform(); + AMDAIE::registerAMDAIERoutePathfinderFlows(); + AMDAIE::registerAMDAIEDmaToNpu(); + AMDAIE::registerAMDAIEXToStandardPass(); AMDAIE::registerAIRConversionPasses(); AMDAIE::registerAIRTransformPasses(); + + xilinx::AIE::registerAIEAssignBufferAddresses(); + xilinx::AIE::registerAIEAssignBufferDescriptorIDs(); + xilinx::AIE::registerAIEAssignLockIDs(); + xilinx::AIE::registerAIECoreToStandard(); + xilinx::AIE::registerAIELocalizeLocks(); + xilinx::AIE::registerAIENormalizeAddressSpaces(); + xilinx::AIE::registerAIEObjectFifoStatefulTransform(); + xilinx::AIE::registerAIERoutePathfinderFlows(); + xilinx::AIEX::registerAIEDmaToNpu(); + xilinx::AIEX::registerAIEXToStandardPass(); } void onRegisterDialects(DialectRegistry ®istry) override { diff --git a/compiler/plugins/target/AMD-AIE/iree-amd-aie/Target/AIETargetDirect.cpp b/compiler/plugins/target/AMD-AIE/iree-amd-aie/Target/AIETargetDirect.cpp index d1a73fb09..8e981b4fb 100644 --- a/compiler/plugins/target/AMD-AIE/iree-amd-aie/Target/AIETargetDirect.cpp +++ b/compiler/plugins/target/AMD-AIE/iree-amd-aie/Target/AIETargetDirect.cpp @@ -180,12 +180,13 @@ class AIETargetDirectBackend final : public IREE::HAL::TargetBackend { OpPassManager &variantPassManager) override { OpPassManager &modulePassManager = variantPassManager.nest(); auto &devicePassMan = modulePassManager.nest(); - devicePassMan.addPass(createAIEObjectFifoStatefulTransformPass()); - devicePassMan.addPass(createAIEAssignBufferAddressesBasicPass()); - devicePassMan.addPass(createAIEAssignLockIDsPass()); - devicePassMan.addPass(createAIEAssignBufferDescriptorIDsPass()); - devicePassMan.addPass(createAIEPathfinderPass()); - devicePassMan.addPass(createAIELocalizeLocksPass()); + devicePassMan.addPass(createAMDAIEObjectFifoStatefulTransformPass()); + devicePassMan.addPass(createAMDAIEAssignBufferAddressesBasicPass()); + devicePassMan.addPass(createAMDAIEAssignLockIDsPass()); + devicePassMan.addPass(createAMDAIEAssignBufferDescriptorIDsPass()); + devicePassMan.addPass(createAMDAIEPathfinderPass()); + devicePassMan.addPass(createAMDAIELocalizeLocksPass()); + devicePassMan.addPass(createAMDAIENormalizeAddressSpacesPass()); } void buildLinkingPassPipeline(OpPassManager &passManager) override { diff --git a/compiler/plugins/target/AMD-AIE/iree-amd-aie/Target/XCLBinGen.cpp b/compiler/plugins/target/AMD-AIE/iree-amd-aie/Target/XCLBinGen.cpp index 9ebe0608d..f4d603795 100644 --- a/compiler/plugins/target/AMD-AIE/iree-amd-aie/Target/XCLBinGen.cpp +++ b/compiler/plugins/target/AMD-AIE/iree-amd-aie/Target/XCLBinGen.cpp @@ -331,7 +331,7 @@ static LogicalResult generateCDO(MLIRContext *context, ModuleOp moduleOp, applyConfigToPassManager(TK, passManager); passManager.addNestedPass( - mlir::iree_compiler::AMDAIE::createAIEPathfinderPass()); + mlir::iree_compiler::AMDAIE::createAMDAIEPathfinderPass()); if (failed(passManager.run(copy))) return moduleOp.emitOpError( "failed to run passes to prepare of XCLBin generation"); @@ -682,8 +682,8 @@ static LogicalResult generateUnifiedObject(MLIRContext *context, PassManager pm(context, moduleOp.getOperationName()); applyConfigToPassManager(TK, pm); - pm.addPass(mlir::iree_compiler::AMDAIE::createAIECoreToStandardPass()); - pm.addPass(mlir::iree_compiler::AMDAIE::createAIEXToStandardPass()); + pm.addPass(mlir::iree_compiler::AMDAIE::createAMDAIECoreToStandardPass()); + pm.addPass(mlir::iree_compiler::AMDAIE::createAMDAIEXToStandardPass()); // Convert specific vector dialect ops (like vector.contract) to the AIEVec // dialect @@ -826,7 +826,7 @@ LogicalResult xilinx::aie2xclbin(MLIRContext *ctx, ModuleOp moduleOp, // generateNPUInstructions pm.addNestedPass( - mlir::iree_compiler::AMDAIE::createAIEDmaToNpuPass()); + mlir::iree_compiler::AMDAIE::createAMDAIEDmaToNpuPass()); if (failed(pm.run(moduleOp))) return moduleOp.emitOpError(": NPU Instruction pipeline failed"); diff --git a/runtime/src/iree-amd-aie/aie_runtime/CMakeLists.txt b/runtime/src/iree-amd-aie/aie_runtime/CMakeLists.txt index bac904f39..5782af042 100644 --- a/runtime/src/iree-amd-aie/aie_runtime/CMakeLists.txt +++ b/runtime/src/iree-amd-aie/aie_runtime/CMakeLists.txt @@ -56,6 +56,7 @@ elseif(CMAKE_CXX_COMPILER_ID MATCHES "Clang|GNU") -Wno-deprecated-declarations -Wno-deprecated-register -Wno-dynamic-class-memaccess + -Wno-format -Wno-implicit-fallthrough -Wno-incompatible-function-pointer-types -Wno-incompatible-pointer-types-discards-qualifiers