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app: Add 91M1 overlay for pin configuration
Add overlay and documentation for 91M1 pin configuration for v2.x pre-releases. Signed-off-by: Markus Lassila <markus.lassila@nordicsemi.no>
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‎app/overlay-91m1.overlay‎

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/*
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* Copyright (c) 2026 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/* AT command UART */
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&uart0 {
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compatible = "nordic,nrf-uarte";
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current-speed = <115200>;
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hw-flow-control;
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status = "okay";
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dtr_uart0: dtr-uart {
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compatible = "nordic,dtr-uart";
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dtr-gpios = <&gpio0 31 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; /* 9151 SiP LGA pin: 50 */
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ri-gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; /* 9151 SiP LGA pin: 49 */
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status = "okay";
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};
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pinctrl-0 = <&uart0_default_91m1>;
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pinctrl-1 = <&uart0_sleep_91m1>;
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pinctrl-names = "default", "sleep";
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};
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&gpio0 {
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status = "okay";
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/* Use PORT event for DTR (31) pin to save power */
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sense-edge-mask = <0x80000000>;
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};
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/* Log / Trace UART */
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&uart1 {
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pinctrl-0 = <&uart1_default_91m1>;
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pinctrl-1 = <&uart1_sleep_91m1>;
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pinctrl-names = "default", "sleep";
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};
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&pinctrl {
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uart0_default_91m1: uart0_default_91m1 {
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group1 {
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psels = <NRF_PSEL(UART_RX, 0, 26)>; /* 9151 SiP LGA pin: 44 */
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bias-pull-up;
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};
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group2 {
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psels = <NRF_PSEL(UART_CTS, 0, 15)>; /* 9151 SiP LGA pin: 75 */
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bias-pull-down;
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};
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group3 {
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psels = <NRF_PSEL(UART_TX, 0, 27)>, /* 9151 SiP LGA pin: 45 */
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<NRF_PSEL(UART_RTS, 0, 14)>; /* 9151 SiP LGA pin: 74 */
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};
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};
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uart0_sleep_91m1: uart0_sleep_91m1 {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 27)>,
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<NRF_PSEL(UART_RX, 0, 26)>,
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<NRF_PSEL(UART_RTS, 0, 14)>,
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<NRF_PSEL(UART_CTS, 0, 15)>;
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low-power-enable;
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};
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};
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uart1_default_91m1: uart1_default_91m1 {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 29)>; /* 9151 SiP LGA pin: 48 */
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};
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group2 {
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psels = <NRF_PSEL(UART_RX, 0, 28)>; /* 9151 SiP LGA pin: 47 (floating) */
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bias-pull-up;
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};
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};
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uart1_sleep_91m1: uart1_sleep_91m1 {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 29)>,
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<NRF_PSEL(UART_RX, 0, 28)>;
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low-power-enable;
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};
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};
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};

‎app/sample.yaml‎

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- thingy91x/nrf9151/ns
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integration_platforms:
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- nrf9151dk/nrf9151/ns
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serial_modem.91m1:
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sysbuild: true
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build_only: true
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extra_args:
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- EXTRA_CONF_FILE="overlay-cmux.conf;overlay-ppp.conf"
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- EXTRA_DTC_OVERLAY_FILE="overlay-91m1.overlay"
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platform_allow:
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- nrf9151dk/nrf9151/ns
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serial_modem.memfault:
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sysbuild: true
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build_only: true

‎doc/app/sm_configuration.rst‎

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The overlay is pin compatible with nRF9151DK.
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For other setups, you can customize the overlay to fit your configuration.
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* :file:`overlay-91m1.overlay` - Devicetree overlay for use with the nRF91M1 SiP.
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Configures ``uart0`` and ``uart1`` with pins suitable for both 9151 DK usage and for connecting to an external MCU.
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See :ref:`uart_configuration_nrf91m1` for pin details.
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* :file:`overlay-carrier.conf` - Configuration file that adds |NCS| `LwM2M carrier`_ support.
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See :ref:`sm_carrier_library_support` for more information on how to connect to an operator's device management platform.
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‎doc/links.txt‎

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.. _`nRF91 DK`: https://docs.nordicsemi.com/bundle/ncs-latest/page/nrf/app_dev/device_guides/nrf91/index.html#ug-nrf91
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.. _`nrf9151dk`: https://docs.nordicsemi.com/bundle/ncs-latest/page/zephyr/boards/nordic/nrf9151dk/doc/index.html#nrf9151dk
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.. _`nRF9151 Product Specification`: https://docs.nordicsemi.com/bundle/ps_nrf9151/page/nRF9151_html5_keyfeatures.html
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.. _`nRF9151 LGA pin assignments`: https://docs.nordicsemi.com/bundle/ps_nrf9151/page/pin.html#ariaid-title2
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.. _`Thingy91x_firmware_update`: https://docs.nordicsemi.com/bundle/ncs-latest/page/nrf/app_dev/device_guides/thingy91x/thingy91x_updating_fw_programmer.html#updating_the_firmware_on_the_nrf5340_soc
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.. _`shared TF-M logging`: https://docs.nordicsemi.com/bundle/ncs-latest/page/nrf/app_dev/device_guides/nrf91/nrf91_snippet.html#tfm-enable-share-uart
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‎doc/uart_configuration.rst‎

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The RI pin is connected to the blue LED, which is used to indicate incoming data.
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.. _uart_configuration_nrf91m1:
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nRF91M1 - pre-programmed |SM| application
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===================================================
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nRF91M1 is a pre-programmed nRF9151 SiP that runs the |SM| application out of the box.
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The pin mapping of the nRF91M1 follows the `nrf9151dk`_ board configuration.
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91M1 software can be flashed to `nrf9151dk`_ board for development and testing purposes.
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The following table shows how to connect the UART pins to the corresponding pins on the nRF91M1 SiP:
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.. list-table::
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:header-rows: 1
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* - Signal
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- `nrf9151dk`_
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- `nRF9151 LGA pin assignments`_
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* - UART0 TX
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- P0.27
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- 45
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* - UART0 RX
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- P0.26 (pull-up)
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- 44 (pull-up)
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* - UART0 RTS
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- P0.14
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- 74
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* - UART0 CTS
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- P0.15 (pull-down)
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- 75 (pull-down)
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* - UART0 DTR
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- P0.31 (active low, pull-up) (Wire to GND to power on the UART0)
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- 50 (active low, pull-up)
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* - UART0 RI
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- P0.30 (active low)
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- 49 (active low)
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* - UART1 TX
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- P0.29
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- 48
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**AT UART:**
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* UART instance: UART0 (VCOM0)
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* Baud rate: 115200
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* Hardware flow control: Enabled
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**Log / Trace UART:**
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* UART instance: UART1 (VCOM1)
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* Baud rate: 1000000
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* Hardware flow control: Disabled
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.. important::
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When working with `nrf9151dk`_ board with a PC host, the DTR pin must be wired to GND to power on the UART0.
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Currently, this needs to be done with a physical jumper wire, but in the future, this can be done in the `Board Configurator app`_.
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By default in the `nrf9151dk`_ board, the UART0 is routed to VCOM0 on the interface chip, and UART1 is routed to VCOM1 on the interface chip.
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This allows the `nrf9151dk`_ board to be used with a PC host for development and testing.
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When working with `nrf9151dk`_ board with external MCU host, VCOM0 and VCOM1 must be disabled in the `Board Configurator app`_ to release the UART pins for external use.
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This setup is provided in the :file:`app/overlay-91m1.overlay` devicetree overlay file.
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Host application
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================
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