Apply suggestions from code review

Co-authored-by: Divya S Pillai <91891495+divipillai@users.noreply.github.com>

Author: MarkusLassila

doc/uart_configuration.rst

@@ -45,7 +45,7 @@ The following UART signals are used:
 The Data Terminal Ready (DTR) and Ring Indicator (RI) signals are the **control signals** used for UART power management, while TX/RX/RTS/CTS are the standard UART signals.
 
 .. important::
-   The use of |SM| without hardware flow control (RTS/CTS) is `Experimental <Software maturity levels_>`_ and highly discouraged.
+   The use of |SM| without hardware flow control (RTS/CTS) is `experimental <Software maturity levels_>`_ and strongly not recommended.
    See :ref:`uart_without_flow_control` for more information.
 
 Board-specific pin mapping
@@ -281,11 +281,11 @@ Once the host UART is ready and DTR is asserted, the nRF91 enables its UART inte
 The RI signal remains active throughout this process and only returns to inactive once the nRF91 UART is active.
 This coordinated wake-up ensures both ends of the communication link are ready before data transmission begins.
 
-**With hardware flow control:** The host can observe its CTS pin (connected to |SM|'s RTS) to know when |SM| is ready to receive data.
+**With hardware flow control -**  The host can observe its CTS pin (connected to |SM|'s RTS) to know when |SM| is ready to receive data.
 When |SM| starts driving its RTS pin, the host knows that |SM| is ready to receive.
-The host should also have a pull-up on its CTS pin.
+The host must also have a pull-up on its CTS pin.
 
-**Without hardware flow control:** The host must monitor the **RI signal**, which is de-asserted when the |SM| UART becomes ready to receive data.
+**Without hardware flow control-** The host must monitor the RI signal, which is de-asserted when the |SM| UART becomes ready to receive data.
 Alternatively, the host can implement a sufficient timeout between asserting DTR and initiating its first TX operation.
 
 Host-initiated wake-up
@@ -305,7 +305,7 @@ Operating without hardware flow control
 ========================================
 
 .. important::
-   The use of |SM| without hardware flow control (RTS/CTS) is `Experimental <Software maturity levels_>`_ and highly discouraged.
+   The use of |SM| without hardware flow control (RTS/CTS) is `experimental <Software maturity levels_>`_ and strongly not recommended..
    Hardware flow control ensures reliable communication and prevents timing-related issues.
    Without hardware flow control, there is a risk of data loss in UART communication, especially in high-throughput scenarios.
 
@@ -314,9 +314,9 @@ The host can operate without connecting the hardware flow control signals (CTS/R
 
 **Key requirements:**
 
-* The host must enable its own UART before asserting DTR
-* To detect when |SM| is ready to receive, monitor the RI signal (de-asserted when ready) or use a sufficient timeout after DTR assertion
-* See `Incoming data wake-up`_ for detailed timing information
+* The host must enable its own UART before asserting DTR.
+* To detect when |SM| is ready to receive, monitor the RI signal (de-asserted when ready) or use a sufficient timeout after DTR assertion.
+* See `Incoming data wake-up`_ for detailed timing information.
 
 **Buffer configuration:**