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devicetree: format all files
Format all the devicetree files to allign with the Zephyr coding guidelines. The changes have been generated using the `dts-linter` cli tool. Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
1 parent 342e22c commit b62659b

25 files changed

Lines changed: 82 additions & 82 deletions

‎samples/light_bulb/boards/nrf52840dk_nrf52840.overlay‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,6 @@
3636
low-power-enable;
3737
};
3838
};
39-
4039
};
4140

4241
&timer2 {

‎samples/light_bulb/boards/nrf5340dk_nrf5340_cpuapp.overlay‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
/ {
88
pwmleds {
99
compatible = "pwm-leds";
10+
1011
pwm_led3: pwm_led_3 {
1112
pwms = <&pwm0 1 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
1213
};
@@ -37,7 +38,6 @@
3738
low-power-enable;
3839
};
3940
};
40-
4141
};
4242

4343
&timer2 {

‎samples/light_bulb/boards/nrf54l15dk_nrf54l10_cpuapp.overlay‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -4,15 +4,14 @@
44
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55
*/
66

7-
87
/ {
9-
108
chosen {
119
ncs,zigbee-timer = &timer20;
1210
};
1311

1412
pwmleds {
1513
compatible = "pwm-leds";
14+
1615
pwm_led3: pwm_led_3 {
1716
pwms = <&pwm20 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
1817
};
@@ -22,13 +21,13 @@
2221
// restore full RRAM and SRAM space - by default some parts are dedicated to FLPR
2322
&cpuapp_rram {
2423
reg = <0x0 DT_SIZE_K(1012)>;
25-
26-
// Resize storage_partition to fit within memory boundaries
24+
25+
// Resize storage_partition to fit within memory boundaries
2726
partitions {
2827
compatible = "fixed-partitions";
2928
#address-cells = <1>;
3029
#size-cells = <1>;
31-
30+
3231
storage_partition: partition@f6000 {
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label = "storage";
3433
reg = <0xF6000 DT_SIZE_K(28)>;
@@ -38,7 +37,7 @@
3837

3938
&cpuapp_sram {
4039
reg = <0x20000000 DT_SIZE_K(192)>;
41-
ranges = <0x0 0x20000000 DT_SIZE_K(192)>;
40+
ranges = <0x0 0x20000000 DT_SIZE_K(192)>;
4241
};
4342

4443
// TODO: re-enable HWFC once it's fixed
@@ -59,6 +58,7 @@
5958
psels = <NRF_PSEL(PWM_OUT1, 1, 10)>;
6059
};
6160
};
61+
6262
pwm_sleep: pwm_sleep {
6363
group1 {
6464
psels = <NRF_PSEL(PWM_OUT1, 1, 10)>;

‎samples/light_bulb/boards/nrf54l15dk_nrf54l15_cpuapp.overlay‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -4,15 +4,14 @@
44
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55
*/
66

7-
87
/ {
9-
108
chosen {
119
ncs,zigbee-timer = &timer20;
1210
};
1311

1412
pwmleds {
1513
compatible = "pwm-leds";
14+
1615
pwm_led3: pwm_led_3 {
1716
pwms = <&pwm20 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
1817
};
@@ -26,7 +25,7 @@
2625

2726
&cpuapp_sram {
2827
reg = <0x20000000 DT_SIZE_K(256)>;
29-
ranges = <0x0 0x20000000 0x40000>;
28+
ranges = <0x0 0x20000000 0x40000>;
3029
};
3130

3231
// TODO: re-enable HWFC once it's fixed
@@ -47,6 +46,7 @@
4746
psels = <NRF_PSEL(PWM_OUT1, 1, 10)>;
4847
};
4948
};
49+
5050
pwm_sleep: pwm_sleep {
5151
group1 {
5252
psels = <NRF_PSEL(PWM_OUT1, 1, 10)>;

‎samples/light_switch/boards/nrf5340dk_nrf5340_cpuapp.overlay‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55
*/
66

7-
/ {
7+
/ {
88
chosen {
99
nordic,pm-ext-flash = &mx25r64;
1010
ncs,zigbee-timer = &timer2;

‎samples/light_switch/boards/nrf54l15dk_nrf54l10_cpuapp.overlay‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -4,15 +4,14 @@
44
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55
*/
66

7-
87
/ {
9-
108
chosen {
119
ncs,zigbee-timer = &timer20;
1210
};
1311

1412
pwmleds {
1513
compatible = "pwm-leds";
14+
1615
pwm_led3: pwm_led_3 {
1716
pwms = <&pwm20 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
1817
};
@@ -22,13 +21,13 @@
2221
// restore full RRAM and SRAM space - by default some parts are dedicated to FLPR
2322
&cpuapp_rram {
2423
reg = <0x0 DT_SIZE_K(1012)>;
25-
26-
// Resize storage_partition to fit within memory boundaries
24+
25+
// Resize storage_partition to fit within memory boundaries
2726
partitions {
2827
compatible = "fixed-partitions";
2928
#address-cells = <1>;
3029
#size-cells = <1>;
31-
30+
3231
storage_partition: partition@f6000 {
3332
label = "storage";
3433
reg = <0xF6000 DT_SIZE_K(28)>;
@@ -38,7 +37,7 @@
3837

3938
&cpuapp_sram {
4039
reg = <0x20000000 DT_SIZE_K(192)>;
41-
ranges = <0x0 0x20000000 DT_SIZE_K(192)>;
40+
ranges = <0x0 0x20000000 DT_SIZE_K(192)>;
4241
};
4342

4443
// TODO: re-enable HWFC once it's fixed
@@ -59,6 +58,7 @@
5958
psels = <NRF_PSEL(PWM_OUT1, 1, 10)>;
6059
};
6160
};
61+
6262
pwm_sleep: pwm_sleep {
6363
group1 {
6464
psels = <NRF_PSEL(PWM_OUT1, 1, 10)>;

‎samples/light_switch/boards/nrf54l15dk_nrf54l10_cpuapp_fota.overlay‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -4,16 +4,15 @@
44
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55
*/
66

7-
87
/ {
9-
108
chosen {
119
ncs,zigbee-timer = &timer20;
1210
nordic,pm-ext-flash = &mx25r64;
1311
};
1412

1513
pwmleds {
1614
compatible = "pwm-leds";
15+
1716
pwm_led3: pwm_led_3 {
1817
pwms = <&pwm20 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
1918
};
@@ -23,13 +22,13 @@
2322
// restore full RRAM and SRAM space - by default some parts are dedicated to FLPR
2423
&cpuapp_rram {
2524
reg = <0x0 DT_SIZE_K(1012)>;
26-
27-
// Resize storage_partition to fit within memory boundaries
25+
26+
// Resize storage_partition to fit within memory boundaries
2827
partitions {
2928
compatible = "fixed-partitions";
3029
#address-cells = <1>;
3130
#size-cells = <1>;
32-
31+
3332
storage_partition: partition@f6000 {
3433
label = "storage";
3534
reg = <0xF6000 DT_SIZE_K(28)>;
@@ -39,7 +38,7 @@
3938

4039
&cpuapp_sram {
4140
reg = <0x20000000 DT_SIZE_K(192)>;
42-
ranges = <0x0 0x20000000 DT_SIZE_K(192)>;
41+
ranges = <0x0 0x20000000 DT_SIZE_K(192)>;
4342
};
4443

4544
// TODO: re-enable HWFC once it's fixed
@@ -60,6 +59,7 @@
6059
psels = <NRF_PSEL(PWM_OUT1, 1, 10)>;
6160
};
6261
};
62+
6363
pwm_sleep: pwm_sleep {
6464
group1 {
6565
psels = <NRF_PSEL(PWM_OUT1, 1, 10)>;

‎samples/light_switch/boards/nrf54l15dk_nrf54l15_cpuapp.overlay‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -4,15 +4,14 @@
44
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55
*/
66

7-
87
/ {
9-
108
chosen {
119
ncs,zigbee-timer = &timer20;
1210
};
1311

1412
pwmleds {
1513
compatible = "pwm-leds";
14+
1615
pwm_led3: pwm_led_3 {
1716
pwms = <&pwm20 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
1817
};
@@ -26,7 +25,7 @@
2625

2726
&cpuapp_sram {
2827
reg = <0x20000000 DT_SIZE_K(256)>;
29-
ranges = <0x0 0x20000000 0x40000>;
28+
ranges = <0x0 0x20000000 0x40000>;
3029
};
3130

3231
// TODO: re-enable HWFC once it's fixed
@@ -47,6 +46,7 @@
4746
psels = <NRF_PSEL(PWM_OUT1, 1, 10)>;
4847
};
4948
};
49+
5050
pwm_sleep: pwm_sleep {
5151
group1 {
5252
psels = <NRF_PSEL(PWM_OUT1, 1, 10)>;

‎samples/light_switch/boards/nrf54l15dk_nrf54l15_cpuapp_fota.overlay‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -4,16 +4,15 @@
44
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55
*/
66

7-
87
/ {
9-
108
chosen {
119
ncs,zigbee-timer = &timer20;
1210
nordic,pm-ext-flash = &mx25r64;
1311
};
1412

1513
pwmleds {
1614
compatible = "pwm-leds";
15+
1716
pwm_led3: pwm_led_3 {
1817
pwms = <&pwm20 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
1918
};
@@ -27,7 +26,7 @@
2726

2827
&cpuapp_sram {
2928
reg = <0x20000000 DT_SIZE_K(256)>;
30-
ranges = <0x0 0x20000000 0x40000>;
29+
ranges = <0x0 0x20000000 0x40000>;
3130
};
3231

3332
// TODO: re-enable HWFC once it's fixed
@@ -48,6 +47,7 @@
4847
psels = <NRF_PSEL(PWM_OUT1, 1, 10)>;
4948
};
5049
};
50+
5151
pwm_sleep: pwm_sleep {
5252
group1 {
5353
psels = <NRF_PSEL(PWM_OUT1, 1, 10)>;

‎samples/light_switch/sysbuild/mcuboot/boards/nrf54l15dk_nrf54l10_cpuapp.overlay‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -13,13 +13,13 @@
1313
// restore full RRAM and SRAM space - by default some parts are dedicated to FLPR
1414
&cpuapp_rram {
1515
reg = <0x0 DT_SIZE_K(1012)>;
16-
17-
// Resize storage_partition to fit within memory boundaries
16+
17+
// Resize storage_partition to fit within memory boundaries
1818
partitions {
1919
compatible = "fixed-partitions";
2020
#address-cells = <1>;
2121
#size-cells = <1>;
22-
22+
2323
storage_partition: partition@f6000 {
2424
label = "storage";
2525
reg = <0xF6000 DT_SIZE_K(28)>;
@@ -29,7 +29,7 @@
2929

3030
&cpuapp_sram {
3131
reg = <0x20000000 DT_SIZE_K(192)>;
32-
ranges = <0x0 0x20000000 DT_SIZE_K(192)>;
32+
ranges = <0x0 0x20000000 DT_SIZE_K(192)>;
3333
};
3434

3535
&mx25r64 {

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