|
11 | 11 | #if defined(NRF54L15_XXAA) |
12 | 12 | #include <hal/nrf_clock.h> |
13 | 13 | #endif /* defined(NRF54L15_XXAA) */ |
14 | | -#if defined(CONFIG_CLOCK_CONTROL_NRF2) |
15 | | -#include <hal/nrf_lrcconf.h> |
16 | | -#endif |
17 | 14 | #include <nrfx.h> |
18 | 15 | /* TODO: DRGN-27733 Remove the alternative condition for nRF54LS05B |
19 | 16 | * when the errata has been applied to this chip and the errata |
|
29 | 26 | /* Empty trim value */ |
30 | 27 | #define TRIM_VALUE_EMPTY 0xFFFFFFFF |
31 | 28 |
|
32 | | -#if defined(CONFIG_CLOCK_CONTROL_NRF) |
33 | 29 | static void clock_init(void) |
34 | 30 | { |
35 | 31 | int err; |
@@ -78,129 +74,11 @@ static void clock_init(void) |
78 | 74 | printk("Clock has started\n"); |
79 | 75 | } |
80 | 76 |
|
81 | | -#elif defined(CONFIG_CLOCK_CONTROL_NRF2) |
82 | | - |
83 | | -static void clock_init(void) |
84 | | -{ |
85 | | - int err; |
86 | | - int res; |
87 | | - const struct device *radio_clk_dev = |
88 | | - DEVICE_DT_GET_OR_NULL(DT_CLOCKS_CTLR(DT_NODELABEL(radio))); |
89 | | - struct onoff_client radio_cli; |
90 | | - |
91 | | - /** Keep radio domain powered all the time to reduce latency. */ |
92 | | - nrf_lrcconf_poweron_force_set(NRF_LRCCONF010, NRF_LRCCONF_POWER_DOMAIN_1, true); |
93 | | - |
94 | | - sys_notify_init_spinwait(&radio_cli.notify); |
95 | | - |
96 | | - err = nrf_clock_control_request(radio_clk_dev, NULL, &radio_cli); |
97 | | - |
98 | | - do { |
99 | | - err = sys_notify_fetch_result(&radio_cli.notify, &res); |
100 | | - if (!err && res) { |
101 | | - printk("Clock could not be started: %d\n", res); |
102 | | - return; |
103 | | - } |
104 | | - } while (err == -EAGAIN); |
105 | | - |
106 | | - printk("Clock has started\n"); |
107 | | -} |
108 | | - |
109 | | -#if defined(CONFIG_SOC_SERIES_NRF54H) |
110 | | -static void nrf54hx_radio_trim(void) |
111 | | -{ |
112 | | - /* Apply HMPAN-102 workaround for nRF54H series */ |
113 | | - *(volatile uint32_t *)0x5302C7E4 = |
114 | | - (((*((volatile uint32_t *)0x5302C7E4)) & 0xFF000FFF) | 0x0012C000); |
115 | | - |
116 | | - /* Apply HMPAN-18 workaround for nRF54H series - load trim values*/ |
117 | | - if (*(volatile uint32_t *) 0x0FFFE458 != TRIM_VALUE_EMPTY) { |
118 | | - *(volatile uint32_t *) 0x5302C734 = *(volatile uint32_t *) 0x0FFFE458; |
119 | | - } |
120 | | - |
121 | | - if (*(volatile uint32_t *) 0x0FFFE45C != TRIM_VALUE_EMPTY) { |
122 | | - *(volatile uint32_t *) 0x5302C738 = *(volatile uint32_t *) 0x0FFFE45C; |
123 | | - } |
124 | | - |
125 | | - if (*(volatile uint32_t *) 0x0FFFE460 != TRIM_VALUE_EMPTY) { |
126 | | - *(volatile uint32_t *) 0x5302C73C = *(volatile uint32_t *) 0x0FFFE460; |
127 | | - } |
128 | | - |
129 | | - if (*(volatile uint32_t *) 0x0FFFE464 != TRIM_VALUE_EMPTY) { |
130 | | - *(volatile uint32_t *) 0x5302C740 = *(volatile uint32_t *) 0x0FFFE464; |
131 | | - } |
132 | | - |
133 | | - if (*(volatile uint32_t *) 0x0FFFE468 != TRIM_VALUE_EMPTY) { |
134 | | - *(volatile uint32_t *) 0x5302C74C = *(volatile uint32_t *) 0x0FFFE468; |
135 | | - } |
136 | | - |
137 | | - if (*(volatile uint32_t *) 0x0FFFE46C != TRIM_VALUE_EMPTY) { |
138 | | - *(volatile uint32_t *) 0x5302C7D8 = *(volatile uint32_t *) 0x0FFFE46C; |
139 | | - } |
140 | | - |
141 | | - if (*(volatile uint32_t *) 0x0FFFE470 != TRIM_VALUE_EMPTY) { |
142 | | - *(volatile uint32_t *) 0x5302C840 = *(volatile uint32_t *) 0x0FFFE470; |
143 | | - } |
144 | | - |
145 | | - if (*(volatile uint32_t *) 0x0FFFE474 != TRIM_VALUE_EMPTY) { |
146 | | - *(volatile uint32_t *) 0x5302C844 = *(volatile uint32_t *) 0x0FFFE474; |
147 | | - } |
148 | | - |
149 | | - if (*(volatile uint32_t *) 0x0FFFE478 != TRIM_VALUE_EMPTY) { |
150 | | - *(volatile uint32_t *) 0x5302C848 = *(volatile uint32_t *) 0x0FFFE478; |
151 | | - } |
152 | | - |
153 | | - if (*(volatile uint32_t *) 0x0FFFE47C != TRIM_VALUE_EMPTY) { |
154 | | - *(volatile uint32_t *) 0x5302C84C = *(volatile uint32_t *) 0x0FFFE47C; |
155 | | - } |
156 | | - |
157 | | - /* Apply HMPAN-103 workaround for nRF54H series*/ |
158 | | - if ((*(volatile uint32_t *) 0x5302C8A0 == 0x80000000) || |
159 | | - (*(volatile uint32_t *) 0x5302C8A0 == 0x0058120E)) { |
160 | | - *(volatile uint32_t *) 0x5302C8A0 = 0x0058090E; |
161 | | - } |
162 | | - |
163 | | - *(volatile uint32_t *) 0x5302C8A4 = 0x00F8AA5F; |
164 | | - *(volatile uint32_t *) 0x5302C7AC = 0x8672827A; |
165 | | - *(volatile uint32_t *) 0x5302C7B0 = 0x7E768672; |
166 | | - *(volatile uint32_t *) 0x5302C7B4 = 0x0406007E; |
167 | | -} |
168 | | -#endif /* defined(CONFIG_SOC_SERIES_NRF54H) */ |
169 | | - |
170 | | -#else |
171 | | -BUILD_ASSERT(false, "No Clock Control driver"); |
172 | | -#endif /* defined(CONFIG_CLOCK_CONTROL_NRF) */ |
173 | | - |
174 | 77 | int main(void) |
175 | 78 | { |
176 | 79 | printk("Starting Radio Test sample\n"); |
177 | 80 |
|
178 | | -#if defined(CONFIG_SOC_SERIES_NRF54H) |
179 | | - const struct device *console_uart = DEVICE_DT_GET_OR_NULL(DT_CHOSEN(zephyr_console)); |
180 | | - const struct device *shell_uart = DEVICE_DT_GET_OR_NULL(DT_CHOSEN(zephyr_shell_uart)); |
181 | | - |
182 | | - if (console_uart != NULL) { |
183 | | - int ret = pm_device_runtime_get(console_uart); |
184 | | - |
185 | | - if (ret < 0) { |
186 | | - printk("Failed to get console UART runtime PM: %d\n", ret); |
187 | | - } |
188 | | - } |
189 | | - |
190 | | - if (shell_uart != NULL && shell_uart != console_uart) { |
191 | | - int ret = pm_device_runtime_get(shell_uart); |
192 | | - |
193 | | - if (ret < 0) { |
194 | | - printk("Failed to get shell UART runtime PM: %d\n", ret); |
195 | | - } |
196 | | - } |
197 | | -#endif /* defined(CONFIG_SOC_SERIES_NRF54H) */ |
198 | | - |
199 | 81 | clock_init(); |
200 | 82 |
|
201 | | -#if defined(CONFIG_SOC_SERIES_NRF54H) |
202 | | - nrf54hx_radio_trim(); |
203 | | -#endif |
204 | | - |
205 | 83 | return 0; |
206 | 84 | } |
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