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boards/nordic/bm_nrf54l15dk/include/board-config.h

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@@ -63,40 +63,79 @@ extern "C" {
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#define BOARD_CONSOLE_UARTE_PIN_CTS NRF_PIN_PORT_TO_PIN_NUMBER(7, 1)
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#endif
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/* Application SPI master configuration */
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#ifndef BOARD_APP_SPIM_INST
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#define BOARD_APP_SPIM_INST NRF_SPIM21
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#endif
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#ifndef BOARD_APP_SPIM_PIN_SCK
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#define BOARD_APP_SPIM_PIN_SCK NRF_PIN_PORT_TO_PIN_NUMBER(11, 1)
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#endif
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#ifndef BOARD_APP_SPIM_PIN_MOSI
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#define BOARD_APP_SPIM_PIN_MOSI NRF_PIN_PORT_TO_PIN_NUMBER(12, 1)
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#endif
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#ifndef BOARD_APP_SPIM_PIN_MISO
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#define BOARD_APP_SPIM_PIN_MISO NRF_PIN_PORT_TO_PIN_NUMBER(13, 1) /* Shared with Button 0. */
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#endif
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#ifndef BOARD_APP_SPIM_PIN_CSN
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#define BOARD_APP_SPIM_PIN_CSN NRF_PIN_PORT_TO_PIN_NUMBER(14, 1) /* Shared with LED 3. */
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#endif
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/* Application SPI slave configuration */
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#ifndef BOARD_APP_SPIS_INST
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#define BOARD_APP_SPIS_INST NRF_SPIS30
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#endif
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#ifndef BOARD_APP_SPIS_PIN_SCK
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#define BOARD_APP_SPIS_PIN_SCK NRF_PIN_PORT_TO_PIN_NUMBER(0, 0)
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#endif
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#ifndef BOARD_APP_SPIS_PIN_MOSI
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#define BOARD_APP_SPIS_PIN_MOSI NRF_PIN_PORT_TO_PIN_NUMBER(1, 0)
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#endif
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#ifndef BOARD_APP_SPIS_PIN_MISO
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#define BOARD_APP_SPIS_PIN_MISO NRF_PIN_PORT_TO_PIN_NUMBER(2, 0)
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#endif
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#ifndef BOARD_APP_SPIS_PIN_CSN
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#define BOARD_APP_SPIS_PIN_CSN NRF_PIN_PORT_TO_PIN_NUMBER(3, 0)
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#endif
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/* Application UART configuration */
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#ifndef BOARD_APP_UARTE_INST
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#define BOARD_APP_UARTE_INST NRF_UARTE30
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#endif
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#ifndef BOARD_APP_UARTE_PIN_TX
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#define BOARD_APP_UARTE_PIN_TX NRF_PIN_PORT_TO_PIN_NUMBER(0, 0)
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#define BOARD_APP_UARTE_PIN_TX NRF_PIN_PORT_TO_PIN_NUMBER(0, 0) /* Shared with SPI slave SCK. */
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#endif
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#ifndef BOARD_APP_UARTE_PIN_RX
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#define BOARD_APP_UARTE_PIN_RX NRF_PIN_PORT_TO_PIN_NUMBER(1, 0)
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#define BOARD_APP_UARTE_PIN_RX NRF_PIN_PORT_TO_PIN_NUMBER(1, 0) /* Shared with SPI slave MOSI. */
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#endif
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#ifndef BOARD_APP_UARTE_PIN_RTS
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#define BOARD_APP_UARTE_PIN_RTS NRF_PIN_PORT_TO_PIN_NUMBER(2, 0)
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#define BOARD_APP_UARTE_PIN_RTS NRF_PIN_PORT_TO_PIN_NUMBER(2, 0) /* Shared with SPI slave MISO. */
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#endif
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#ifndef BOARD_APP_UARTE_PIN_CTS
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#define BOARD_APP_UARTE_PIN_CTS NRF_PIN_PORT_TO_PIN_NUMBER(3, 0)
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#define BOARD_APP_UARTE_PIN_CTS NRF_PIN_PORT_TO_PIN_NUMBER(3, 0) /* Shared with SPI slave CSN. */
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#endif
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/* Application LPUART configuration */
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#ifndef BOARD_APP_LPUARTE_INST
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#define BOARD_APP_LPUARTE_INST NRF_UARTE21
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#endif
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/* Shared with SPI master SCK. */
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#ifndef BOARD_APP_LPUARTE_PIN_TX
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#define BOARD_APP_LPUARTE_PIN_TX NRF_PIN_PORT_TO_PIN_NUMBER(11, 1)
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#endif
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/* Shared with SPI master MOSI. */
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#ifndef BOARD_APP_LPUARTE_PIN_RX
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#define BOARD_APP_LPUARTE_PIN_RX NRF_PIN_PORT_TO_PIN_NUMBER(12, 1)
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#endif
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#ifndef BOARD_APP_LPUARTE_PIN_REQ
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#define BOARD_APP_LPUARTE_PIN_REQ NRF_PIN_PORT_TO_PIN_NUMBER(4, 0) /* Shared with button 3. */
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#endif
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/* Shared with LED 3 and SPI master CSN. */
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#ifndef BOARD_APP_LPUARTE_PIN_RDY
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#define BOARD_APP_LPUARTE_PIN_RDY NRF_PIN_PORT_TO_PIN_NUMBER(14, 1) /* Shared with LED 3. */
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#define BOARD_APP_LPUARTE_PIN_RDY NRF_PIN_PORT_TO_PIN_NUMBER(14, 1)
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#endif
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#ifdef __cplusplus
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#
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# Copyright (c) 2025 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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cmake_minimum_required(VERSION 3.20.0)
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find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
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project(spi)
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target_sources(app PRIVATE src/main.c)

samples/peripherals/spi/Kconfig

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#
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# Copyright (c) 2026 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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menu "SPI sample"
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config SAMPLE_SPI_MSG
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string "Message to send over SPI"
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default "Hello World!"
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help
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The message that the SPI master sends to the SPI slave when the button is pressed.
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module=SAMPLE_SPI
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module-str=SPI Sample
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source "$(ZEPHYR_BASE)/subsys/logging/Kconfig.template.log_config"
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endmenu # "SPI sample"
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source "Kconfig.zephyr"

samples/peripherals/spi/README.rst

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.. _uarte_sample:
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UARTE
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#####
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.. contents::
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:local:
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:depth: 2
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The UARTE sample demonstrates how to configure and use the UARTE peripheral with nrfx drivers.
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Requirements
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************
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The sample supports the following development kits:
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.. tabs::
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.. group-tab:: Simple board variants
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The following board variants do **not** have DFU capabilities:
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.. list-table::
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:header-rows: 1
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* - Hardware platform
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- PCA
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- SoftDevice
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- Board target
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* - `nRF54L15 DK`_
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- PCA10156
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- S115
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- bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice
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* - `nRF54L15 DK`_ (emulating nRF54L10)
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- PCA10156
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- S115
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- bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice
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* - `nRF54L15 DK`_ (emulating nRF54L05)
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- PCA10156
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- S115
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- bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice
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* - `nRF54LM20 DK`_
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- PCA10184
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- S115
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- bm_nrf54lm20dk/nrf54lm20a/cpuapp/s115_softdevice
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* - nRF54LS05 DK
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- PCA10214
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- S115
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- bm_nrf54ls05dk/nrf54ls05b/cpuapp/s115_softdevice
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* - `nRF54LV10 DK`_
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- PCA10188
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- S115
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- bm_nrf54lv10dk/nrf54lv10a/cpuapp/s115_softdevice
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* - `nRF54L15 DK`_
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- PCA10156
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- S145
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- bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice
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* - `nRF54L15 DK`_ (emulating nRF54L10)
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- PCA10156
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- S145
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- bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice
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* - `nRF54L15 DK`_ (emulating nRF54L05)
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- PCA10156
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- S145
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- bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice
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* - `nRF54LM20 DK`_
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- PCA10184
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- S145
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- bm_nrf54lm20dk/nrf54lm20a/cpuapp/s145_softdevice
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* - nRF54LS05 DK
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- PCA10214
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- S145
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- bm_nrf54ls05dk/nrf54ls05b/cpuapp/s145_softdevice
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* - `nRF54LV10 DK`_
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- PCA10188
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- S145
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- bm_nrf54lv10dk/nrf54lv10a/cpuapp/s145_softdevice
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.. group-tab:: MCUboot board variants
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The following board variants have DFU capabilities:
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.. list-table::
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:header-rows: 1
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* - Hardware platform
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- PCA
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- SoftDevice
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- Board target
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* - `nRF54L15 DK`_
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- PCA10156
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- S115
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- bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice/mcuboot
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* - `nRF54L15 DK`_ (emulating nRF54L10)
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- PCA10156
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- S115
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- bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice/mcuboot
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* - `nRF54L15 DK`_ (emulating nRF54L05)
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- PCA10156
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- S115
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- bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice/mcuboot
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* - `nRF54LM20 DK`_
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- PCA10184
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- S115
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- bm_nrf54lm20dk/nrf54lm20a/cpuapp/s115_softdevice/mcuboot
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* - nRF54LS05 DK
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- PCA10214
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- S115
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- bm_nrf54ls05dk/nrf54ls05b/cpuapp/s115_softdevice/mcuboot
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* - `nRF54LV10 DK`_
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- PCA10188
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- S115
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- bm_nrf54lv10dk/nrf54lv10a/cpuapp/s115_softdevice/mcuboot
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* - `nRF54L15 DK`_
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- PCA10156
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- S145
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- bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice/mcuboot
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* - `nRF54L15 DK`_ (emulating nRF54L10)
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- PCA10156
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- S145
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- bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice/mcuboot
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* - `nRF54L15 DK`_ (emulating nRF54L05)
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- PCA10156
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- S145
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- bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice/mcuboot
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* - `nRF54LM20 DK`_
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- PCA10184
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- S145
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- bm_nrf54lm20dk/nrf54lm20a/cpuapp/s145_softdevice/mcuboot
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* - nRF54LS05 DK
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- PCA10214
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- S145
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- bm_nrf54ls05dk/nrf54ls05b/cpuapp/s145_softdevice/mcuboot
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* - `nRF54LV10 DK`_
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- PCA10188
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- S145
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- bm_nrf54lv10dk/nrf54lv10a/cpuapp/s145_softdevice/mcuboot
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Overview
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********
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The sample initializes the application UARTE instance, specified in the :file:`board-config.h` file in the board.
143+
It then outputs a message on the UART before echoing the message entered by the user.
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User interface
146+
**************
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LED 0:
149+
Lit when the device is initialized.
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Building and running
152+
********************
153+
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This sample can be found under :file:`samples/peripherals/uarte/` in the |BMshort| folder structure.
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For details on how to create, configure, and program a sample, see :ref:`getting_started_with_the_samples`.
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Testing
159+
=======
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You can test this sample by performing the following steps:
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1. Compile and program the application.
164+
#. Connect to the kit with a terminal emulator (for example, the `Serial Terminal app`_).
165+
Note that the kit has two UARTs, where one will output the log and the other is used for the sample UARTE instance.
166+
#. Observe that the ``UARTE sample initialized`` message is printed in one terminal.
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#. Observe that the ``Hello world! I will echo the lines you enter:`` message is printed in another terminal.
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#. Enter a message in the terminal.
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Observe that you receive the same line in response when pressing Enter (sending ``\r`` or ``\n`` to the device).
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spi STUFF:
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Wire 1: LOOPBACK_PIN_1A (P1.13) ↔ LOOPBACK_PIN_1B (P1.12) → SS / CSN
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Wire 2: LOOPBACK_PIN_2A (P1.11) ↔ LOOPBACK_PIN_2B (P1.10) → MOSI
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Wire 3: LOOPBACK_PIN_3A (P1.09) ↔ LOOPBACK_PIN_3B (P1.08) → MISO
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Wire 4: LOOPBACK_PIN_4A (P2.06) ↔ LOOPBACK_PIN_4B (P1.04) → SCK

samples/peripherals/spi/prj.conf

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# Logging
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CONFIG_LOG=y
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CONFIG_LOG_BACKEND_BM_UARTE=y
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# Enabling SoftDevice is not strictly needed, though we are building with SoftDevice boards.
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CONFIG_SOFTDEVICE=y
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# Clock control
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CONFIG_CLOCK_CONTROL=y
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# LED libraries
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CONFIG_BM_GPIOTE=y
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# Button libraries
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CONFIG_BM_BUTTONS=y
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CONFIG_BM_TIMER=y
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# SPI libraries
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CONFIG_NRFX_SPIM=y
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CONFIG_NRFX_SPIS=y
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sample:
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name: SPI Sample
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tests:
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sample.spi:
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sysbuild: true
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build_only: true
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integration_platforms:
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- bm_nrf54ls05dk/nrf54ls05b/cpuapp/s115_softdevice
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platform_allow:
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- bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice
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- bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice/mcuboot
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- bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice
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- bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice/mcuboot
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- bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice
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- bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice/mcuboot
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- bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice
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- bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice/mcuboot
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- bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice
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- bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice/mcuboot
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- bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice
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- bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice/mcuboot
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- bm_nrf54lm20dk/nrf54lm20a/cpuapp/s115_softdevice
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- bm_nrf54lm20dk/nrf54lm20a/cpuapp/s115_softdevice/mcuboot
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- bm_nrf54lm20dk/nrf54lm20a/cpuapp/s145_softdevice
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- bm_nrf54lm20dk/nrf54lm20a/cpuapp/s145_softdevice/mcuboot
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- bm_nrf54ls05dk/nrf54ls05b/cpuapp/s115_softdevice
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- bm_nrf54ls05dk/nrf54ls05b/cpuapp/s115_softdevice/mcuboot
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- bm_nrf54ls05dk/nrf54ls05b/cpuapp/s145_softdevice
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- bm_nrf54ls05dk/nrf54ls05b/cpuapp/s145_softdevice/mcuboot
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- bm_nrf54lv10dk/nrf54lv10a/cpuapp/s115_softdevice
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- bm_nrf54lv10dk/nrf54lv10a/cpuapp/s115_softdevice/mcuboot
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- bm_nrf54lv10dk/nrf54lv10a/cpuapp/s145_softdevice
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- bm_nrf54lv10dk/nrf54lv10a/cpuapp/s145_softdevice/mcuboot
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tags: ci_build

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