diff --git a/boards/nordic/bm_nrf54l15dk/include/board-config.h b/boards/nordic/bm_nrf54l15dk/include/board-config.h index a836a40934..e3c73462c4 100644 --- a/boards/nordic/bm_nrf54l15dk/include/board-config.h +++ b/boards/nordic/bm_nrf54l15dk/include/board-config.h @@ -63,6 +63,42 @@ extern "C" { #define BOARD_CONSOLE_UARTE_PIN_CTS NRF_PIN_PORT_TO_PIN_NUMBER(7, 1) #endif +/* Application SPI master configuration */ +#ifndef BOARD_APP_SPIM_INST +#define BOARD_APP_SPIM_INST NRF_SPIM21 +#endif + +#ifndef BOARD_APP_SPIM_PIN_SCK +#define BOARD_APP_SPIM_PIN_SCK NRF_PIN_PORT_TO_PIN_NUMBER(11, 1) +#endif +#ifndef BOARD_APP_SPIM_PIN_MOSI +#define BOARD_APP_SPIM_PIN_MOSI NRF_PIN_PORT_TO_PIN_NUMBER(12, 1) +#endif +#ifndef BOARD_APP_SPIM_PIN_MISO +#define BOARD_APP_SPIM_PIN_MISO NRF_PIN_PORT_TO_PIN_NUMBER(13, 1) +#endif +#ifndef BOARD_APP_SPIM_PIN_CSN +#define BOARD_APP_SPIM_PIN_CSN NRF_PIN_PORT_TO_PIN_NUMBER(14, 1) +#endif + +/* Application SPI slave configuration */ +#ifndef BOARD_APP_SPIS_INST +#define BOARD_APP_SPIS_INST NRF_SPIS30 +#endif + +#ifndef BOARD_APP_SPIS_PIN_SCK +#define BOARD_APP_SPIS_PIN_SCK NRF_PIN_PORT_TO_PIN_NUMBER(0, 0) +#endif +#ifndef BOARD_APP_SPIS_PIN_MOSI +#define BOARD_APP_SPIS_PIN_MOSI NRF_PIN_PORT_TO_PIN_NUMBER(1, 0) +#endif +#ifndef BOARD_APP_SPIS_PIN_MISO +#define BOARD_APP_SPIS_PIN_MISO NRF_PIN_PORT_TO_PIN_NUMBER(2, 0) +#endif +#ifndef BOARD_APP_SPIS_PIN_CSN +#define BOARD_APP_SPIS_PIN_CSN NRF_PIN_PORT_TO_PIN_NUMBER(3, 0) +#endif + /* Application UART configuration */ #ifndef BOARD_APP_UARTE_INST #define BOARD_APP_UARTE_INST NRF_UARTE30 @@ -104,17 +140,20 @@ extern "C" { #define BOARD_APP_LPUARTE_INST NRF_UARTE21 #endif +/* Shared with SPI master SCK. */ #ifndef BOARD_APP_LPUARTE_PIN_TX #define BOARD_APP_LPUARTE_PIN_TX NRF_PIN_PORT_TO_PIN_NUMBER(11, 1) #endif +/* Shared with SPI master MOSI. */ #ifndef BOARD_APP_LPUARTE_PIN_RX #define BOARD_APP_LPUARTE_PIN_RX NRF_PIN_PORT_TO_PIN_NUMBER(12, 1) #endif #ifndef BOARD_APP_LPUARTE_PIN_REQ #define BOARD_APP_LPUARTE_PIN_REQ NRF_PIN_PORT_TO_PIN_NUMBER(4, 0) /* Shared with button 3. */ #endif +/* Shared with LED 3 and SPI master CSN. */ #ifndef BOARD_APP_LPUARTE_PIN_RDY -#define BOARD_APP_LPUARTE_PIN_RDY NRF_PIN_PORT_TO_PIN_NUMBER(14, 1) /* Shared with LED 3. */ +#define BOARD_APP_LPUARTE_PIN_RDY NRF_PIN_PORT_TO_PIN_NUMBER(14, 1) #endif #ifdef __cplusplus diff --git a/boards/nordic/bm_nrf54lm20dk/include/board-config.h b/boards/nordic/bm_nrf54lm20dk/include/board-config.h index b369da77f0..81eb78b94f 100644 --- a/boards/nordic/bm_nrf54lm20dk/include/board-config.h +++ b/boards/nordic/bm_nrf54lm20dk/include/board-config.h @@ -63,6 +63,42 @@ extern "C" { #define BOARD_CONSOLE_UARTE_PIN_CTS NRF_PIN_PORT_TO_PIN_NUMBER(19, 1) #endif +/* Application SPI master configuration */ +#ifndef BOARD_APP_SPIM_INST +#define BOARD_APP_SPIM_INST NRF_SPIM21 +#endif + +#ifndef BOARD_APP_SPIM_PIN_SCK +#define BOARD_APP_SPIM_PIN_SCK NRF_PIN_PORT_TO_PIN_NUMBER(11, 1) +#endif +#ifndef BOARD_APP_SPIM_PIN_MOSI +#define BOARD_APP_SPIM_PIN_MOSI NRF_PIN_PORT_TO_PIN_NUMBER(12, 1) +#endif +#ifndef BOARD_APP_SPIM_PIN_MISO +#define BOARD_APP_SPIM_PIN_MISO NRF_PIN_PORT_TO_PIN_NUMBER(13, 1) +#endif +#ifndef BOARD_APP_SPIM_PIN_CSN +#define BOARD_APP_SPIM_PIN_CSN NRF_PIN_PORT_TO_PIN_NUMBER(14, 1) +#endif + +/* Application SPI slave configuration */ +#ifndef BOARD_APP_SPIS_INST +#define BOARD_APP_SPIS_INST NRF_SPIS30 +#endif + +#ifndef BOARD_APP_SPIS_PIN_SCK +#define BOARD_APP_SPIS_PIN_SCK NRF_PIN_PORT_TO_PIN_NUMBER(0, 0) +#endif +#ifndef BOARD_APP_SPIS_PIN_MOSI +#define BOARD_APP_SPIS_PIN_MOSI NRF_PIN_PORT_TO_PIN_NUMBER(1, 0) +#endif +#ifndef BOARD_APP_SPIS_PIN_MISO +#define BOARD_APP_SPIS_PIN_MISO NRF_PIN_PORT_TO_PIN_NUMBER(2, 0) +#endif +#ifndef BOARD_APP_SPIS_PIN_CSN +#define BOARD_APP_SPIS_PIN_CSN NRF_PIN_PORT_TO_PIN_NUMBER(3, 0) +#endif + /* Application UART configuration */ #ifndef BOARD_APP_UARTE_INST #define BOARD_APP_UARTE_INST NRF_UARTE30 diff --git a/boards/nordic/bm_nrf54ls05dk/include/board-config.h b/boards/nordic/bm_nrf54ls05dk/include/board-config.h index 0ac1554149..f88e09c1ed 100644 --- a/boards/nordic/bm_nrf54ls05dk/include/board-config.h +++ b/boards/nordic/bm_nrf54ls05dk/include/board-config.h @@ -63,6 +63,42 @@ extern "C" { #define BOARD_CONSOLE_UARTE_PIN_CTS NRF_PIN_PORT_TO_PIN_NUMBER(7, 1) #endif +/* Application SPI master configuration */ +#ifndef BOARD_APP_SPIM_INST +#define BOARD_APP_SPIM_INST NRF_SPIM21 +#endif + +#ifndef BOARD_APP_SPIM_PIN_SCK +#define BOARD_APP_SPIM_PIN_SCK NRF_PIN_PORT_TO_PIN_NUMBER(2, 1) +#endif +#ifndef BOARD_APP_SPIM_PIN_MOSI +#define BOARD_APP_SPIM_PIN_MOSI NRF_PIN_PORT_TO_PIN_NUMBER(3, 1) +#endif +#ifndef BOARD_APP_SPIM_PIN_MISO +#define BOARD_APP_SPIM_PIN_MISO NRF_PIN_PORT_TO_PIN_NUMBER(5, 1) +#endif +#ifndef BOARD_APP_SPIM_PIN_CSN +#define BOARD_APP_SPIM_PIN_CSN NRF_PIN_PORT_TO_PIN_NUMBER(6, 1) +#endif + +/* Application SPI slave configuration */ +#ifndef BOARD_APP_SPIS_INST +#define BOARD_APP_SPIS_INST NRF_SPIS22 +#endif + +#ifndef BOARD_APP_SPIS_PIN_SCK +#define BOARD_APP_SPIS_PIN_SCK NRF_PIN_PORT_TO_PIN_NUMBER(11, 1) +#endif +#ifndef BOARD_APP_SPIS_PIN_MOSI +#define BOARD_APP_SPIS_PIN_MOSI NRF_PIN_PORT_TO_PIN_NUMBER(12, 1) +#endif +#ifndef BOARD_APP_SPIS_PIN_MISO +#define BOARD_APP_SPIS_PIN_MISO NRF_PIN_PORT_TO_PIN_NUMBER(21, 1) +#endif +#ifndef BOARD_APP_SPIS_PIN_CSN +#define BOARD_APP_SPIS_PIN_CSN NRF_PIN_PORT_TO_PIN_NUMBER(22, 1) +#endif + /* Application UART configuration */ #ifndef BOARD_APP_UARTE_INST #define BOARD_APP_UARTE_INST NRF_UARTE21 diff --git a/boards/nordic/bm_nrf54lv10dk/include/board-config.h b/boards/nordic/bm_nrf54lv10dk/include/board-config.h index 7e2f0fd7be..10345450b3 100644 --- a/boards/nordic/bm_nrf54lv10dk/include/board-config.h +++ b/boards/nordic/bm_nrf54lv10dk/include/board-config.h @@ -63,6 +63,42 @@ extern "C" { #define BOARD_CONSOLE_UARTE_PIN_CTS NRF_PIN_PORT_TO_PIN_NUMBER(7, 1) #endif +/* Application SPI master configuration */ +#ifndef BOARD_APP_SPIM_INST +#define BOARD_APP_SPIM_INST NRF_SPIM21 +#endif + +#ifndef BOARD_APP_SPIM_PIN_SCK +#define BOARD_APP_SPIM_PIN_SCK NRF_PIN_PORT_TO_PIN_NUMBER(0, 1) +#endif +#ifndef BOARD_APP_SPIM_PIN_MOSI +#define BOARD_APP_SPIM_PIN_MOSI NRF_PIN_PORT_TO_PIN_NUMBER(1, 1) +#endif +#ifndef BOARD_APP_SPIM_PIN_MISO +#define BOARD_APP_SPIM_PIN_MISO NRF_PIN_PORT_TO_PIN_NUMBER(2, 1) +#endif +#ifndef BOARD_APP_SPIM_PIN_CSN +#define BOARD_APP_SPIM_PIN_CSN NRF_PIN_PORT_TO_PIN_NUMBER(3, 1) +#endif + +/* Application SPI slave configuration */ +#ifndef BOARD_APP_SPIS_INST +#define BOARD_APP_SPIS_INST NRF_SPIS30 +#endif + +#ifndef BOARD_APP_SPIS_PIN_SCK +#define BOARD_APP_SPIS_PIN_SCK NRF_PIN_PORT_TO_PIN_NUMBER(0, 0) +#endif +#ifndef BOARD_APP_SPIS_PIN_MOSI +#define BOARD_APP_SPIS_PIN_MOSI NRF_PIN_PORT_TO_PIN_NUMBER(1, 0) +#endif +#ifndef BOARD_APP_SPIS_PIN_MISO +#define BOARD_APP_SPIS_PIN_MISO NRF_PIN_PORT_TO_PIN_NUMBER(2, 0) +#endif +#ifndef BOARD_APP_SPIS_PIN_CSN +#define BOARD_APP_SPIS_PIN_CSN NRF_PIN_PORT_TO_PIN_NUMBER(3, 0) +#endif + /* Application UART configuration */ #ifndef BOARD_APP_UARTE_INST #define BOARD_APP_UARTE_INST NRF_UARTE30 diff --git a/doc/nrf-bm/includes/spi_board_connections.txt b/doc/nrf-bm/includes/spi_board_connections.txt new file mode 100644 index 0000000000..ece32ab699 --- /dev/null +++ b/doc/nrf-bm/includes/spi_board_connections.txt @@ -0,0 +1,49 @@ +.. list-table:: SPIM and SPIS pin connections (board-config.h). + :widths: auto + :header-rows: 1 + + * - Development Kit + - nRF54L15 DK + - nRF54LM20 DK + - nRF54LS05 DK + - nRF54LV10 DK + * - SPIM SCK + - P1.11 + - P1.11 + - P1.02 + - P1.00 + * - SPIM MOSI + - P1.12 + - P1.12 + - P1.03 + - P1.01 + * - SPIM MISO + - P1.13 + - P1.13 + - P1.05 + - P1.02 + * - SPIM CSN + - P1.14 + - P1.14 + - P1.06 + - P1.03 + * - SPIS SCK + - P0.00 + - P0.00 + - P1.11 + - P0.00 + * - SPIS MOSI + - P0.01 + - P0.01 + - P1.12 + - P0.01 + * - SPIS MISO + - P0.02 + - P0.02 + - P1.21 + - P0.02 + * - SPIS CSN + - P0.03 + - P0.03 + - P1.22 + - P0.03 diff --git a/doc/nrf-bm/links.txt b/doc/nrf-bm/links.txt index a5ab83af7d..8e13e2cb2e 100644 --- a/doc/nrf-bm/links.txt +++ b/doc/nrf-bm/links.txt @@ -91,6 +91,7 @@ .. _`How to flash an application`: https://docs.nordicsemi.com/bundle/nrf-connect-vscode/page/get_started/quick_debug.html#how-to-flash-an-application .. _`How to connect to the terminal`: https://docs.nordicsemi.com/bundle/nrf-connect-vscode/page/get_started/quick_debug.html#how-to-connect-to-the-terminal .. _`nRF Connect for Desktop`: https://www.nordicsemi.com/Software-and-Tools/Development-Tools/nRF-Connect-for-desktop +.. _`Board Configurator`: https://docs.nordicsemi.com/bundle/nrf-connect-board-configurator/page/index.html .. _`additional requirements`: https://docs.nordicsemi.com/bundle/nrf-connect-desktop/page/download_cfd.html .. _`nRF Connect Device Manager`: https://www.nordicsemi.com/Products/Development-tools/nRF-Connect-Device-Manager .. _`nRF Toolbox`: https://www.nordicsemi.com/Software-and-Tools/Development-Tools/nRF-Toolbox diff --git a/doc/nrf-bm/release_notes/release_notes_changelog.rst b/doc/nrf-bm/release_notes/release_notes_changelog.rst index 11ab2319a5..6a1f4c24a8 100644 --- a/doc/nrf-bm/release_notes/release_notes_changelog.rst +++ b/doc/nrf-bm/release_notes/release_notes_changelog.rst @@ -108,7 +108,7 @@ No changes since the latest nRF Connect SDK Bare Metal release. Peripheral samples ------------------ -No changes since the latest nRF Connect SDK Bare Metal release. +* Added the :ref:`bm_spi_sample` sample. DFU samples ----------- diff --git a/samples/peripherals/spi/CMakeLists.txt b/samples/peripherals/spi/CMakeLists.txt new file mode 100644 index 0000000000..44a5b6b1a2 --- /dev/null +++ b/samples/peripherals/spi/CMakeLists.txt @@ -0,0 +1,12 @@ +# +# Copyright (c) 2026 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +cmake_minimum_required(VERSION 3.20.0) + +find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +project(spi) + +target_sources(app PRIVATE src/main.c) diff --git a/samples/peripherals/spi/Kconfig b/samples/peripherals/spi/Kconfig new file mode 100644 index 0000000000..470557221e --- /dev/null +++ b/samples/peripherals/spi/Kconfig @@ -0,0 +1,21 @@ +# +# Copyright (c) 2026 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +menu "SPI sample" + +config SAMPLE_SPI_MSG + string "Message to send over SPI" + default "Hello World!" + help + The message that the SPI master sends to the SPI slave when the button is pressed. + +module=SAMPLE_SPI +module-str=SPI Sample +source "$(ZEPHYR_BASE)/subsys/logging/Kconfig.template.log_config" + +endmenu # "SPI sample" + +source "Kconfig.zephyr" diff --git a/samples/peripherals/spi/README.rst b/samples/peripherals/spi/README.rst new file mode 100644 index 0000000000..227ce31a51 --- /dev/null +++ b/samples/peripherals/spi/README.rst @@ -0,0 +1,88 @@ +.. _bm_spi_sample: + +SPI +### + +.. contents:: + :local: + :depth: 2 + +The SPI sample demonstrates how to configure and use the SPIM and SPIS peripherals with the nrfx drivers. + +Requirements +************ + +The sample supports the following development kits: + +.. tabs:: + + .. group-tab:: Simple board variants + + The following board variants do **not** have DFU capabilities: + + .. include:: /includes/supported_boards_all_non-mcuboot_variants_s115.txt + + .. include:: /includes/supported_boards_all_non-mcuboot_variants_s145.txt + + .. group-tab:: MCUboot board variants + + The following board variants have DFU capabilities: + + .. include:: /includes/supported_boards_all_mcuboot_variants_s115.txt + + .. include:: /includes/supported_boards_all_mcuboot_variants_s145.txt + +Overview +******** + +The sample initializes the **SPIM** and **SPIS** instances with the pins configured in the board's :file:`board-config.h`. +When **Button 2** is pressed, the master sends a configurable string (:kconfig:option:`CONFIG_SAMPLE_SPI_MSG`) to the slave. +The slave receives the data, logs it, and toggles **LED 2**. + +User interface +************** + +LED 0 + Lit when the sample is initialized and ready. + +LED 2 + Toggles each time the SPI slave completes a reception. + +Button 2 + Sends a message from the local SPIM to the connected SPIS. + +.. _bm_spi_wiring: + +Wiring +====== + +The sample uses the **SPIM** and **SPIS** pins defined in the board's :file:`board-config.h` header (``BOARD_APP_SPIM_*`` and ``BOARD_APP_SPIS_*``). + +.. include:: /includes/spi_board_connections.txt + +Connect the four SPIM pins to the SPIS pins on the same board, matching each signal by name (SCK→SCK, MOSI→MOSI, MISO→MISO, CSN→CSN). + +.. note:: Board-specific behavior + + * **nRF54L15 DK** — SPI Master pins overlap with **LED 3** (P1.14, flickers during transfers) and **Button 0** (P1.13, do not press during transfers). + * **nRF54LV10 DK** — The SPI Slave pins (P0.00-P0.03) are shared with one of the debugger's virtual serial ports. + Before running the sample, open the `Board Configurator`_ app in `nRF Connect for Desktop`_ and disable the **Connect port VCOM** entry that is mapped to pins **P0.00-P0.03**, to release these pins from the debugger. + Leave the other **Connect port VCOM** entry (mapped to pins **P1.04-P1.07**) enabled, since it is the virtual serial port used to read the sample's log output. + +Building and running +******************** + +This sample can be found under :file:`samples/peripherals/spi/` in the |BMshort| folder structure. + +For details on how to create, configure, and program a sample, see :ref:`getting_started_with_the_samples`. + +Testing +======= + +After building and flashing the sample, test it as follows: + +1. Connect the four SPIM→SPIS signal pairs on the same board (see :ref:`Wiring `). +#. Open the console log and verify that ``SPI sample initialized`` appears in the log. +#. Press **Button 2**. +#. Observe that the log shows a master "sent" entry and a slave "received" entry, both containing the :kconfig:option:`CONFIG_SAMPLE_SPI_MSG` string. +#. Observe that **LED 2** toggles on each completed reception. diff --git a/samples/peripherals/spi/prj.conf b/samples/peripherals/spi/prj.conf new file mode 100644 index 0000000000..e675d1000a --- /dev/null +++ b/samples/peripherals/spi/prj.conf @@ -0,0 +1,20 @@ +# Logging +CONFIG_LOG=y +CONFIG_LOG_BACKEND_BM_UARTE=y + +# Enabling SoftDevice is not strictly needed, though we are building with SoftDevice boards. +CONFIG_SOFTDEVICE=y + +# Clock control +CONFIG_CLOCK_CONTROL=y + +# LED libraries +CONFIG_BM_GPIOTE=y + +# Button libraries +CONFIG_BM_BUTTONS=y +CONFIG_BM_TIMER=y + +# SPI libraries +CONFIG_NRFX_SPIM=y +CONFIG_NRFX_SPIS=y diff --git a/samples/peripherals/spi/sample.yaml b/samples/peripherals/spi/sample.yaml new file mode 100644 index 0000000000..8fab17841a --- /dev/null +++ b/samples/peripherals/spi/sample.yaml @@ -0,0 +1,34 @@ +sample: + name: SPI Sample +tests: + sample.spi: + sysbuild: true + build_only: true + integration_platforms: + - bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice + platform_allow: + - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice + - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice + - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice + - bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice/mcuboot + - bm_nrf54lm20dk/nrf54lm20a/cpuapp/s115_softdevice + - bm_nrf54lm20dk/nrf54lm20a/cpuapp/s115_softdevice/mcuboot + - bm_nrf54lm20dk/nrf54lm20a/cpuapp/s145_softdevice + - bm_nrf54lm20dk/nrf54lm20a/cpuapp/s145_softdevice/mcuboot + - bm_nrf54ls05dk/nrf54ls05b/cpuapp/s115_softdevice + - bm_nrf54ls05dk/nrf54ls05b/cpuapp/s115_softdevice/mcuboot + - bm_nrf54ls05dk/nrf54ls05b/cpuapp/s145_softdevice + - bm_nrf54ls05dk/nrf54ls05b/cpuapp/s145_softdevice/mcuboot + - bm_nrf54lv10dk/nrf54lv10a/cpuapp/s115_softdevice + - bm_nrf54lv10dk/nrf54lv10a/cpuapp/s115_softdevice/mcuboot + - bm_nrf54lv10dk/nrf54lv10a/cpuapp/s145_softdevice + - bm_nrf54lv10dk/nrf54lv10a/cpuapp/s145_softdevice/mcuboot + tags: ci_build diff --git a/samples/peripherals/spi/src/main.c b/samples/peripherals/spi/src/main.c new file mode 100644 index 0000000000..2d00c3b1f2 --- /dev/null +++ b/samples/peripherals/spi/src/main.c @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2026 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +LOG_MODULE_REGISTER(sample, CONFIG_SAMPLE_SPI_LOG_LEVEL); + +static nrfx_spim_t spim_inst = NRFX_SPIM_INSTANCE(BOARD_APP_SPIM_INST); +static nrfx_spis_t spis_inst = NRFX_SPIS_INSTANCE(BOARD_APP_SPIS_INST); + +static uint8_t tx_buf[] = CONFIG_SAMPLE_SPI_MSG; +static uint8_t rx_buf[sizeof(CONFIG_SAMPLE_SPI_MSG)]; + +static void spim_handler(nrfx_spim_event_t const *p_event, void *p_context) +{ + if (p_event->type == NRFX_SPIM_EVENT_DONE) { + LOG_INF("Message sent: \"%s\"", CONFIG_SAMPLE_SPI_MSG); + } +} + +static void spis_handler(nrfx_spis_event_t const *p_event, void *p_context) +{ + if (p_event->evt_type == NRFX_SPIS_XFER_DONE) { + LOG_INF("Message received: \"%s\"", rx_buf); + nrf_gpio_pin_toggle(BOARD_PIN_LED_2); + + nrfx_spis_buffers_set(&spis_inst, NULL, 0, rx_buf, sizeof(rx_buf)); + } +} + +ISR_DIRECT_DECLARE(spim_isr_handler) +{ + nrfx_spim_irq_handler(&spim_inst); + return 0; +} + +ISR_DIRECT_DECLARE(spis_isr_handler) +{ + nrfx_spis_irq_handler(&spis_inst); + return 0; +} + +static void button_handler(uint8_t pin, uint8_t action) +{ + if (pin == BOARD_PIN_BTN_2 && action == BM_BUTTONS_PRESS) { + nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_TX(tx_buf, sizeof(tx_buf)); + + nrfx_spim_xfer(&spim_inst, &xfer, 0); + } +} + +int main(void) +{ + int err; + nrfx_spim_config_t spim_config = NRFX_SPIM_DEFAULT_CONFIG(BOARD_APP_SPIM_PIN_SCK, + BOARD_APP_SPIM_PIN_MOSI, + BOARD_APP_SPIM_PIN_MISO, + BOARD_APP_SPIM_PIN_CSN); + /* Default is 4 MHz. Lower the frequency for reliable two-device operation. */ + spim_config.frequency = NRFX_MHZ_TO_HZ(4); + nrfx_spis_config_t spis_config = NRFX_SPIS_DEFAULT_CONFIG(BOARD_APP_SPIS_PIN_SCK, + BOARD_APP_SPIS_PIN_MOSI, + BOARD_APP_SPIS_PIN_MISO, + BOARD_APP_SPIS_PIN_CSN); + struct bm_buttons_config btn_configs[] = { + { + .pin_number = BOARD_PIN_BTN_2, + .active_state = BM_BUTTONS_ACTIVE_LOW, + .pull_config = BM_BUTTONS_PIN_PULLUP, + .handler = button_handler, + }, + }; + + LOG_INF("SPI sample started"); + + /* SPI setup */ + BM_IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(BOARD_APP_SPIM_INST), IRQ_PRIO_LOWEST, + spim_isr_handler, 0); + irq_enable(NRFX_IRQ_NUMBER_GET(BOARD_APP_SPIM_INST)); + BM_IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(BOARD_APP_SPIS_INST), IRQ_PRIO_LOWEST, + spis_isr_handler, 0); + irq_enable(NRFX_IRQ_NUMBER_GET(BOARD_APP_SPIS_INST)); + + err = nrfx_spim_init(&spim_inst, &spim_config, spim_handler, NULL); + if (err) { + LOG_ERR("SPIM init failed: %d", err); + goto idle; + } + err = nrfx_spis_init(&spis_inst, &spis_config, spis_handler, NULL); + if (err) { + LOG_ERR("SPIS init failed: %d", err); + goto idle; + } + + err = nrfx_spis_buffers_set(&spis_inst, NULL, 0, rx_buf, sizeof(rx_buf)); + if (err) { + LOG_ERR("SPIS buffers set failed: %d", err); + goto idle; + } + LOG_INF("SPI initialized"); + + /* Button setup */ + err = bm_buttons_init(btn_configs, ARRAY_SIZE(btn_configs), + BM_BUTTONS_DETECTION_DELAY_MIN_US); + if (err) { + LOG_ERR("Buttons init failed: %d", err); + goto idle; + } + + err = bm_buttons_enable(); + if (err) { + LOG_ERR("Buttons enable failed: %d", err); + goto idle; + } + + LOG_INF("Buttons initialized"); + + /* LED setup */ + nrf_gpio_cfg_output(BOARD_PIN_LED_0); + nrf_gpio_cfg_output(BOARD_PIN_LED_2); + nrf_gpio_pin_write(BOARD_PIN_LED_0, !BOARD_LED_ACTIVE_STATE); + nrf_gpio_pin_write(BOARD_PIN_LED_2, !BOARD_LED_ACTIVE_STATE); + + LOG_INF("LEDs initialized"); + + /* User info on startup */ + LOG_INF("Press Button 2 to send \"%s\" over SPI", CONFIG_SAMPLE_SPI_MSG); + LOG_INF("Waiting for SPI master to send data..."); + + nrf_gpio_pin_write(BOARD_PIN_LED_0, BOARD_LED_ACTIVE_STATE); + LOG_INF("SPI sample initialized"); + +idle: + while (true) { + log_flush(); + + k_cpu_idle(); + } + + return 0; +}