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ananglcarlescufi
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drivers: mspi_sqspi: Adjust to sQSPI 0.2.0
Follow the new sQSPI naming convention in the sQSPI MSPI shim driver and related cmake definitions. Add also cmake definition for a new symbol (NRF_SQSPI_SP_FIRMWARE_ADDR) that is now required. Signed-off-by: Andrzej Głąbek <[email protected]>
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-65
lines changed

2 files changed

+65
-65
lines changed

drivers/mspi/CMakeLists.txt

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -11,22 +11,22 @@ if(CONFIG_MSPI_NRF_SQSPI)
1111
set(SP_DIR ${ZEPHYR_NRFXLIB_MODULE_DIR}/softperipheral)
1212
set(SQSPI_DIR ${SP_DIR}/sQSPI)
1313

14+
dt_comp_path(sqspi_path COMPATIBLE "nordic,nrf-sqspi" IDX 0)
15+
dt_reg_addr(sqspi_addr PATH ${sqspi_path})
16+
math(EXPR sqspi_sp_firmware_addr "${sqspi_addr} - 0x3c00")
17+
1418
zephyr_library_compile_definitions(
15-
NRFX_QSPI2_ENABLED=1
16-
NRFX_QSPI2_MAX_NUM_DATA_LINES=4
19+
NRF_SQSPI_ENABLED=1
20+
NRF_SQSPI_MAX_NUM_DATA_LINES=4
21+
NRF_SQSPI_SP_FIRMWARE_ADDR=${sqspi_sp_firmware_addr}
1722
)
1823
zephyr_library_include_directories(
1924
${SP_DIR}/include
2025
${SQSPI_DIR}/include
21-
)
22-
zephyr_library_include_directories_ifdef(CONFIG_SOC_NRF54L15
23-
${SQSPI_DIR}/include/nrf54l15
24-
)
25-
zephyr_library_include_directories_ifdef(CONFIG_SOC_NRF54H20
26-
${SQSPI_DIR}/include/nrf54h20
26+
${SQSPI_DIR}/include/${CONFIG_SOC}
2727
)
2828
zephyr_library_sources(
29-
${SQSPI_DIR}/src/nrfx_qspi2.c
29+
${SQSPI_DIR}/src/nrf_sqspi.c
3030
mspi_sqspi.c
3131
)
3232
endif()

drivers/mspi/mspi_sqspi.c

Lines changed: 56 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@
1515
#include <zephyr/sys/util.h>
1616

1717
#include <softperipheral_regif.h>
18-
#include <nrfx_qspi2.h>
18+
#include <nrf_sqspi.h>
1919
#if defined(CONFIG_SOC_SERIES_NRF54LX)
2020
#include <hal/nrf_memconf.h>
2121
#include <hal/nrf_oscillators.h>
@@ -32,7 +32,7 @@ LOG_MODULE_REGISTER(mspi_sqspi, CONFIG_MSPI_LOG_LEVEL);
3232

3333
struct mspi_sqspi_data {
3434
const struct mspi_dev_id *dev_id;
35-
nrfx_qspi2_dev_cfg_t qspi2_dev_cfg;
35+
nrf_sqspi_dev_cfg_t sqspi_dev_cfg;
3636
struct k_sem finished;
3737
/* For synchronization of API calls made from different contexts. */
3838
struct k_sem ctx_lock;
@@ -42,21 +42,21 @@ struct mspi_sqspi_data {
4242
};
4343

4444
struct mspi_sqspi_config {
45-
nrfx_qspi2_t qspi2;
45+
nrf_sqspi_t sqspi;
4646
const struct pinctrl_dev_config *pcfg;
4747
const struct gpio_dt_spec *ce_gpios;
4848
uint8_t ce_gpios_len;
4949
void *mem_reg;
5050
};
5151

52-
static void done_callback(const nrfx_qspi2_t *qspi2, nrfx_qspi2_evt_t *event,
52+
static void done_callback(const nrf_sqspi_t *sqspi, nrf_sqspi_evt_t *event,
5353
void *context)
5454
{
55-
ARG_UNUSED(qspi2);
55+
ARG_UNUSED(sqspi);
5656
struct mspi_sqspi_data *dev_data = context;
5757

58-
if (event->type == NRFX_QSPI2_EVT_XFER_DONE) {
59-
if (event->data.xfer_done == NRFX_QSPI2_RESULT_OK) {
58+
if (event->type == NRF_SQSPI_EVT_XFER_DONE) {
59+
if (event->data.xfer_done == NRF_SQSPI_RESULT_OK) {
6060
k_sem_give(&dev_data->finished);
6161
}
6262
}
@@ -107,34 +107,34 @@ static int _api_dev_config(const struct device *dev,
107107
switch (cfg->io_mode) {
108108
default:
109109
case MSPI_IO_MODE_SINGLE:
110-
dev_data->qspi2_dev_cfg.mspi_lines = NRFX_QSPI2_SPI_LINES_SINGLE;
110+
dev_data->sqspi_dev_cfg.mspi_lines = NRF_SQSPI_SPI_LINES_SINGLE;
111111
break;
112112
case MSPI_IO_MODE_DUAL:
113-
dev_data->qspi2_dev_cfg.mspi_lines = NRFX_QSPI2_SPI_LINES_DUAL_2_2_2;
113+
dev_data->sqspi_dev_cfg.mspi_lines = NRF_SQSPI_SPI_LINES_DUAL_2_2_2;
114114
break;
115115
case MSPI_IO_MODE_DUAL_1_1_2:
116-
dev_data->qspi2_dev_cfg.mspi_lines = NRFX_QSPI2_SPI_LINES_DUAL_1_1_2;
116+
dev_data->sqspi_dev_cfg.mspi_lines = NRF_SQSPI_SPI_LINES_DUAL_1_1_2;
117117
break;
118118
case MSPI_IO_MODE_DUAL_1_2_2:
119-
dev_data->qspi2_dev_cfg.mspi_lines = NRFX_QSPI2_SPI_LINES_DUAL_1_2_2;
119+
dev_data->sqspi_dev_cfg.mspi_lines = NRF_SQSPI_SPI_LINES_DUAL_1_2_2;
120120
break;
121121
case MSPI_IO_MODE_QUAD:
122-
dev_data->qspi2_dev_cfg.mspi_lines = NRFX_QSPI2_SPI_LINES_QUAD_4_4_4;
122+
dev_data->sqspi_dev_cfg.mspi_lines = NRF_SQSPI_SPI_LINES_QUAD_4_4_4;
123123
break;
124124
case MSPI_IO_MODE_QUAD_1_1_4:
125-
dev_data->qspi2_dev_cfg.mspi_lines = NRFX_QSPI2_SPI_LINES_QUAD_1_1_4;
125+
dev_data->sqspi_dev_cfg.mspi_lines = NRF_SQSPI_SPI_LINES_QUAD_1_1_4;
126126
break;
127127
case MSPI_IO_MODE_QUAD_1_4_4:
128-
dev_data->qspi2_dev_cfg.mspi_lines = NRFX_QSPI2_SPI_LINES_QUAD_1_4_4;
128+
dev_data->sqspi_dev_cfg.mspi_lines = NRF_SQSPI_SPI_LINES_QUAD_1_4_4;
129129
break;
130130
case MSPI_IO_MODE_OCTAL:
131-
dev_data->qspi2_dev_cfg.mspi_lines = NRFX_QSPI2_SPI_LINES_OCTAL_8_8_8;
131+
dev_data->sqspi_dev_cfg.mspi_lines = NRF_SQSPI_SPI_LINES_OCTAL_8_8_8;
132132
break;
133133
case MSPI_IO_MODE_OCTAL_1_1_8:
134-
dev_data->qspi2_dev_cfg.mspi_lines = NRFX_QSPI2_SPI_LINES_OCTAL_1_1_8;
134+
dev_data->sqspi_dev_cfg.mspi_lines = NRF_SQSPI_SPI_LINES_OCTAL_1_1_8;
135135
break;
136136
case MSPI_IO_MODE_OCTAL_1_8_8:
137-
dev_data->qspi2_dev_cfg.mspi_lines = NRFX_QSPI2_SPI_LINES_OCTAL_1_8_8;
137+
dev_data->sqspi_dev_cfg.mspi_lines = NRF_SQSPI_SPI_LINES_OCTAL_1_8_8;
138138
break;
139139
}
140140
}
@@ -143,16 +143,16 @@ static int _api_dev_config(const struct device *dev,
143143
switch (cfg->cpp) {
144144
default:
145145
case MSPI_CPP_MODE_0:
146-
dev_data->qspi2_dev_cfg.spi_cpolpha = NRFX_QSPI2_SPI_CPOLPHA_0;
146+
dev_data->sqspi_dev_cfg.spi_cpolpha = NRF_SQSPI_SPI_CPOLPHA_0;
147147
break;
148148
case MSPI_CPP_MODE_1:
149-
dev_data->qspi2_dev_cfg.spi_cpolpha = NRFX_QSPI2_SPI_CPOLPHA_1;
149+
dev_data->sqspi_dev_cfg.spi_cpolpha = NRF_SQSPI_SPI_CPOLPHA_1;
150150
break;
151151
case MSPI_CPP_MODE_2:
152-
dev_data->qspi2_dev_cfg.spi_cpolpha = NRFX_QSPI2_SPI_CPOLPHA_2;
152+
dev_data->sqspi_dev_cfg.spi_cpolpha = NRF_SQSPI_SPI_CPOLPHA_2;
153153
break;
154154
case MSPI_CPP_MODE_3:
155-
dev_data->qspi2_dev_cfg.spi_cpolpha = NRFX_QSPI2_SPI_CPOLPHA_3;
155+
dev_data->sqspi_dev_cfg.spi_cpolpha = NRF_SQSPI_SPI_CPOLPHA_3;
156156
break;
157157
}
158158
}
@@ -165,7 +165,7 @@ static int _api_dev_config(const struct device *dev,
165165
return -EINVAL;
166166
}
167167

168-
dev_data->qspi2_dev_cfg.sck_freq_khz = cfg->freq / 1000;
168+
dev_data->sqspi_dev_cfg.sck_freq_khz = cfg->freq / 1000;
169169
}
170170

171171
if (param_mask & MSPI_DEVICE_CONFIG_DATA_RATE) {
@@ -241,7 +241,7 @@ static int api_get_channel_status(const struct device *dev, uint8_t ch)
241241
}
242242

243243
static int perform_xfer(const struct device *dev,
244-
const nrfx_qspi2_xfer_t *qspi2_xfer,
244+
const nrf_sqspi_xfer_t *sqspi_xfer,
245245
k_timeout_t timeout)
246246
{
247247
const struct mspi_sqspi_config *dev_config = dev->config;
@@ -257,9 +257,9 @@ static int perform_xfer(const struct device *dev,
257257
}
258258
}
259259

260-
err = nrfx_qspi2_xfer(&dev_config->qspi2, qspi2_xfer, 1, 0);
260+
err = nrf_sqspi_xfer(&dev_config->sqspi, sqspi_xfer, 1, 0);
261261
if (err != NRFX_SUCCESS) {
262-
LOG_ERR("nrfx_qspi2_xfer() failed: %08x", err);
262+
LOG_ERR("nrf_sqspi_xfer() failed: %08x", err);
263263
return -EIO;
264264
}
265265

@@ -288,9 +288,9 @@ static int process_packet(const struct device *dev,
288288
k_timeout_t timeout)
289289
{
290290
const struct mspi_sqspi_config *dev_config = dev->config;
291-
nrfx_qspi2_xfer_t qspi2_xfer = {
291+
nrf_sqspi_xfer_t sqspi_xfer = {
292292
/* Use TX direction when there is no data to transfer. */
293-
.dir = NRFX_QSPI2_XFER_DIR_TX,
293+
.dir = NRF_SQSPI_XFER_DIR_TX,
294294
.cmd = packet->cmd,
295295
.address = packet->address,
296296
.data_length = packet->num_bytes,
@@ -301,19 +301,19 @@ static int process_packet(const struct device *dev,
301301

302302
if (packet->num_bytes) {
303303
if (packet->dir == MSPI_TX) {
304-
qspi2_xfer.dir = NRFX_QSPI2_XFER_DIR_TX;
305-
qspi2_xfer.dummy_length = xfer->tx_dummy;
304+
sqspi_xfer.dir = NRF_SQSPI_XFER_DIR_TX;
305+
sqspi_xfer.dummy_length = xfer->tx_dummy;
306306
rc = dmm_buffer_out_prepare(dev_config->mem_reg,
307307
packet->data_buf,
308308
packet->num_bytes,
309-
&qspi2_xfer.p_data);
309+
&sqspi_xfer.p_data);
310310
} else {
311-
qspi2_xfer.dir = NRFX_QSPI2_XFER_DIR_RX;
312-
qspi2_xfer.dummy_length = xfer->rx_dummy;
311+
sqspi_xfer.dir = NRF_SQSPI_XFER_DIR_RX;
312+
sqspi_xfer.dummy_length = xfer->rx_dummy;
313313
rc = dmm_buffer_in_prepare(dev_config->mem_reg,
314314
packet->data_buf,
315315
packet->num_bytes,
316-
&qspi2_xfer.p_data);
316+
&sqspi_xfer.p_data);
317317
}
318318
if (rc < 0) {
319319
LOG_ERR("Failed to allocate DMM buffer (%d)", rc);
@@ -325,7 +325,7 @@ static int process_packet(const struct device *dev,
325325
return 0;
326326
}
327327

328-
rc = perform_xfer(dev, &qspi2_xfer, timeout);
328+
rc = perform_xfer(dev, &sqspi_xfer, timeout);
329329

330330
if (packet->num_bytes) {
331331
/* No need to check the error codes here. These calls could only
@@ -335,12 +335,12 @@ static int process_packet(const struct device *dev,
335335
*/
336336
if (packet->dir == MSPI_TX) {
337337
(void)dmm_buffer_out_release(dev_config->mem_reg,
338-
qspi2_xfer.p_data);
338+
sqspi_xfer.p_data);
339339
} else {
340340
(void)dmm_buffer_in_release(dev_config->mem_reg,
341341
packet->data_buf,
342342
packet->num_bytes,
343-
qspi2_xfer.p_data);
343+
sqspi_xfer.p_data);
344344
}
345345
}
346346

@@ -357,10 +357,10 @@ static int _api_transceive(const struct device *dev,
357357
nrfx_err_t err;
358358
int rc;
359359

360-
err = nrfx_qspi2_dev_cfg(&dev_config->qspi2, &dev_data->qspi2_dev_cfg,
361-
done_callback, dev_data);
360+
err = nrf_sqspi_dev_cfg(&dev_config->sqspi, &dev_data->sqspi_dev_cfg,
361+
done_callback, dev_data);
362362
if (err != NRFX_SUCCESS) {
363-
LOG_ERR("nrfx_qspi2_dev_cfg() failed: %08x", err);
363+
LOG_ERR("nrf_sqspi_dev_cfg() failed: %08x", err);
364364
return -EIO;
365365
}
366366

@@ -439,7 +439,7 @@ static int dev_pm_action_cb(const struct device *dev,
439439
return rc;
440440
}
441441
#endif
442-
nrfx_qspi2_activate(&dev_config->qspi2);
442+
nrf_sqspi_activate(&dev_config->sqspi);
443443
#if defined(CONFIG_SOC_SERIES_NRF54LX)
444444
nrf_memconf_ramblock_ret_enable_set(NRF_MEMCONF,
445445
1, MEMCONF_POWER_RET_MEM0_Pos, false);
@@ -475,7 +475,7 @@ static int dev_pm_action_cb(const struct device *dev,
475475
nrf_memconf_ramblock_ret_enable_set(NRF_MEMCONF,
476476
1, MEMCONF_POWER_RET_MEM0_Pos, true);
477477
#endif
478-
nrfx_qspi2_deactivate(&dev_config->qspi2);
478+
nrf_sqspi_deactivate(&dev_config->sqspi);
479479

480480
k_sem_give(&dev_data->ctx_lock);
481481

@@ -490,18 +490,18 @@ static int dev_init(const struct device *dev)
490490
struct mspi_sqspi_data *dev_data = dev->data;
491491
const struct mspi_sqspi_config *dev_config = dev->config;
492492
const struct gpio_dt_spec *ce_gpio;
493-
static const nrfx_qspi2_cfg_t qspi2_cfg = {
493+
static const nrf_sqspi_cfg_t sqspi_cfg = {
494494
.skip_gpio_cfg = true,
495495
.skip_pmux_cfg = true,
496496
};
497-
nrfx_qspi2_data_fmt_t qspi2_data_fmt = {
498-
.cmd_bit_order = NRFX_QSPI2_DATA_FMT_BIT_ORDER_MSB_FIRST,
499-
.addr_bit_order = NRFX_QSPI2_DATA_FMT_BIT_ORDER_MSB_FIRST,
500-
.data_bit_order = NRFX_QSPI2_DATA_FMT_BIT_ORDER_MSB_FIRST,
497+
nrf_sqspi_data_fmt_t sqspi_data_fmt = {
498+
.cmd_bit_order = NRF_SQSPI_DATA_FMT_BIT_ORDER_MSB_FIRST,
499+
.addr_bit_order = NRF_SQSPI_DATA_FMT_BIT_ORDER_MSB_FIRST,
500+
.data_bit_order = NRF_SQSPI_DATA_FMT_BIT_ORDER_MSB_FIRST,
501501
.data_bit_reorder_unit = 8,
502502
.data_container = 32,
503503
.data_swap_unit = 8,
504-
.data_padding = NRFX_QSPI2_DATA_FMT_PAD_RAW,
504+
.data_padding = NRF_SQSPI_DATA_FMT_PAD_RAW,
505505
};
506506
int rc;
507507
nrfx_err_t err;
@@ -510,9 +510,9 @@ static int dev_init(const struct device *dev)
510510
k_sem_init(&dev_data->ctx_lock, 1, 1);
511511
k_sem_init(&dev_data->cfg_lock, 1, 1);
512512

513-
dev_data->qspi2_dev_cfg.protocol = NRFX_QSPI2_PROTO_SPI_C;
514-
dev_data->qspi2_dev_cfg.sample_sync = NRFX_QSPI2_SAMPLE_SYNC_DELAY;
515-
dev_data->qspi2_dev_cfg.sample_delay_cyc = 1;
513+
dev_data->sqspi_dev_cfg.protocol = NRF_SQSPI_PROTO_SPI_C;
514+
dev_data->sqspi_dev_cfg.sample_sync = NRF_SQSPI_SAMPLE_SYNC_DELAY;
515+
dev_data->sqspi_dev_cfg.sample_delay_cyc = 1;
516516

517517
#if defined(CONFIG_SOC_SERIES_NRF54LX)
518518
nrf_oscillators_pll_freq_set(NRF_OSCILLATORS,
@@ -525,17 +525,17 @@ static int dev_init(const struct device *dev)
525525
#endif /* defined(CONFIG_SOC_SERIES_NRF54LX) */
526526

527527
IRQ_CONNECT(DT_IRQN(VPR_NODE), DT_IRQ(VPR_NODE, priority),
528-
nrfx_isr, nrfx_qspi2_irq_handler, 0);
528+
nrfx_isr, nrf_sqspi_irq_handler, 0);
529529

530-
err = nrfx_qspi2_init(&dev_config->qspi2, &qspi2_cfg);
530+
err = nrf_sqspi_init(&dev_config->sqspi, &sqspi_cfg);
531531
if (err != NRFX_SUCCESS) {
532-
LOG_ERR("nrfx_qspi2_init() failed: %08x", err);
532+
LOG_ERR("nrf_sqspi_init() failed: %08x", err);
533533
return -EIO;
534534
}
535535

536-
err = nrfx_qspi2_dev_data_fmt_set(&dev_config->qspi2, &qspi2_data_fmt);
536+
err = nrf_sqspi_dev_data_fmt_set(&dev_config->sqspi, &sqspi_data_fmt);
537537
if (err != NRFX_SUCCESS) {
538-
LOG_ERR("nrfx_qspi2_dev_data_fmt_set() failed: %08x", err);
538+
LOG_ERR("nrf_sqspi_dev_data_fmt_set() failed: %08x", err);
539539
return -EIO;
540540
}
541541

@@ -585,7 +585,7 @@ static DEVICE_API(mspi, drv_api) = {
585585
PINCTRL_DT_DEFINE(VPR_NODE); \
586586
static struct mspi_sqspi_data dev##inst##_data; \
587587
static const struct mspi_sqspi_config dev##inst##_config = { \
588-
.qspi2 = { \
588+
.sqspi = { \
589589
.p_reg = (void *)DT_INST_REG_ADDR(inst), \
590590
.drv_inst_idx = 0, \
591591
}, \

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