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tests: drivers: ppi_seq_with_spi: Enable test on more platforms
Add overlays required to run the ppi_seq_with_spi test on more platforms. Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
1 parent 99686e5 commit 6a24927

8 files changed

Lines changed: 406 additions & 1 deletion

‎tests/drivers/ppi_seq/ppi_seq_with_spi/boards/nrf54lc10dk_nrf54lc10a_cpuapp.overlay‎

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/*
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* Copyright (c) 2026 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/* Test requires loopbacks:
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* SCK: P1.09 - P1.08
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* MISO: P1.10 - P1.11
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* MOSI: P1.02 - P1.03
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* CS: P1.00 - P1.01
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*/
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&pinctrl {
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spi21_default_alt: spi21_default_alt {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 1, 9)>,
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<NRF_PSEL(SPIM_MISO, 1, 10)>,
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<NRF_PSEL(SPIM_MOSI, 1, 2)>;
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};
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};
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spi21_sleep_alt: spi21_sleep_alt {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 1, 9)>,
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<NRF_PSEL(SPIM_MISO, 1, 10)>,
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<NRF_PSEL(SPIM_MOSI, 1, 2)>;
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low-power-enable;
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};
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};
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spi20_default_alt: spi20_default_alt {
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group1 {
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psels = <NRF_PSEL(SPIS_SCK, 1, 8)>,
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<NRF_PSEL(SPIS_MISO, 1, 11)>,
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<NRF_PSEL(SPIS_MOSI, 1, 3)>,
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<NRF_PSEL(SPIS_CSN, 1, 1)>;
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};
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};
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spi20_sleep_alt: spi20_sleep_alt {
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group1 {
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psels = <NRF_PSEL(SPIS_SCK, 1, 8)>,
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<NRF_PSEL(SPIS_MISO, 1, 11)>,
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<NRF_PSEL(SPIS_MOSI, 1, 3)>,
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<NRF_PSEL(SPIS_CSN, 1, 1)>;
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low-power-enable;
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};
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};
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};
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dut_cnt_timer: &timer21 {
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status = "reserved";
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};
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dut_trig_timer: &timer22 {
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status = "reserved";
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};
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test_timer: &timer23 {
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status = "reserved";
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};
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dut_spi: &spi21 {
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status = "okay";
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pinctrl-0 = <&spi21_default_alt>;
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pinctrl-1 = <&spi21_sleep_alt>;
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pinctrl-names = "default", "sleep";
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overrun-character = <0x00>;
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cs-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
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zephyr,pm-device-runtime-auto;
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dut_spi_dt: test-spi-dev@0 {
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compatible = "vnd,spi-device";
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reg = <0>;
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spi-max-frequency = <DT_FREQ_M(16)>;
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};
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};
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dut_spis: &spi20 {
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compatible = "nordic,nrf-spis";
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status = "okay";
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def-char = <0x00>;
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pinctrl-0 = <&spi20_default_alt>;
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pinctrl-1 = <&spi20_sleep_alt>;
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pinctrl-names = "default", "sleep";
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/delete-property/ rx-delay-supported;
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/delete-property/ rx-delay;
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zephyr,pm-device-runtime-auto;
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};

‎tests/drivers/ppi_seq/ppi_seq_with_spi/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay‎

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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/* Test requires loopbacks:
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* - between P1.3 and P1.4.
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* - between P1.13 and P1.14.

‎tests/drivers/ppi_seq/ppi_seq_with_spi/boards/nrf54lm20dk_nrf54lm20b_cpuapp.overlay‎

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/*
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* Copyright (c) 2026 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include "nrf54lm20dk_nrf54lm20a_cpuapp.overlay"

‎tests/drivers/ppi_seq/ppi_seq_with_spi/boards/nrf54ls05dk_nrf54ls05a_cpuapp.overlay‎

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/*
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* Copyright (c) 2026 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/* Test requires loopbacks:
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* - between P1.04 and P1.20.
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* - between P1.05 and P1.21.
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* - between P1.06 and P1.22,
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* - between P1.08 and P1.09,
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*/
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&pinctrl {
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spi22_default_alt: spi22_default_alt {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 1, 4)>,
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<NRF_PSEL(SPIM_MISO, 1, 5)>,
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<NRF_PSEL(SPIM_MOSI, 1, 6)>;
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};
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};
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spi22_sleep_alt: spi22_sleep_alt {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 1, 4)>,
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<NRF_PSEL(SPIM_MISO, 1, 5)>,
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<NRF_PSEL(SPIM_MOSI, 1, 6)>;
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low-power-enable;
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};
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};
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spi21_default_alt: spi21_default_alt {
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group1 {
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psels = <NRF_PSEL(SPIS_SCK, 1, 20)>,
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<NRF_PSEL(SPIS_MISO, 1, 21)>,
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<NRF_PSEL(SPIS_MOSI, 1, 22)>,
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<NRF_PSEL(SPIS_CSN, 1, 9)>;
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};
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};
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spi21_sleep_alt: spi21_sleep_alt {
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group1 {
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psels = <NRF_PSEL(SPIS_SCK, 1, 20)>,
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<NRF_PSEL(SPIS_MISO, 1, 21)>,
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<NRF_PSEL(SPIS_MOSI, 1, 22)>,
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<NRF_PSEL(SPIS_CSN, 1, 9)>;
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low-power-enable;
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};
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};
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};
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dut_cnt_timer: &timer10 {
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status = "reserved";
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};
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dut_trig_timer: &timer20 {
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status = "reserved";
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};
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test_timer: &timer00 {
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status = "reserved";
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};
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dut_spi: &spi22 {
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status = "okay";
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pinctrl-0 = <&spi22_default_alt>;
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pinctrl-1 = <&spi22_sleep_alt>;
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pinctrl-names = "default", "sleep";
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overrun-character = <0x00>;
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cs-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
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zephyr,pm-device-runtime-auto;
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dut_spi_dt: test-spi-dev@0 {
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compatible = "vnd,spi-device";
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reg = <0>;
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spi-max-frequency = <DT_FREQ_M(16)>;
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};
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};
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dut_spis: &spi21 {
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compatible = "nordic,nrf-spis";
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status = "okay";
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def-char = <0x00>;
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pinctrl-0 = <&spi21_default_alt>;
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pinctrl-1 = <&spi21_sleep_alt>;
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pinctrl-names = "default", "sleep";
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/delete-property/ rx-delay-supported;
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/delete-property/ rx-delay;
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zephyr,pm-device-runtime-auto;
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};

‎tests/drivers/ppi_seq/ppi_seq_with_spi/boards/nrf54ls05dk_nrf54ls05b_cpuapp.overlay‎

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/*
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* Copyright (c) 2026 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include "nrf54ls05dk_nrf54ls05a_cpuapp.overlay"

‎tests/drivers/ppi_seq/ppi_seq_with_spi/boards/nrf54lv10dk_nrf54lv10a_cpuapp.overlay‎

Lines changed: 90 additions & 0 deletions
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/*
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* Copyright (c) 2026 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/* Test requires loopbacks:
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* SCK: P1.09 - P1.08
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* MISO: P1.10 - P1.11
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* MOSI: P1.02 - P1.03
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* CS: P1.00 - P1.01
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*/
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&pinctrl {
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spi21_default_alt: spi21_default_alt {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 1, 9)>,
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<NRF_PSEL(SPIM_MISO, 1, 10)>,
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<NRF_PSEL(SPIM_MOSI, 1, 2)>;
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};
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};
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spi21_sleep_alt: spi21_sleep_alt {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 1, 9)>,
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<NRF_PSEL(SPIM_MISO, 1, 10)>,
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<NRF_PSEL(SPIM_MOSI, 1, 2)>;
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low-power-enable;
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};
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};
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spi20_default_alt: spi20_default_alt {
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group1 {
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psels = <NRF_PSEL(SPIS_SCK, 1, 8)>,
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<NRF_PSEL(SPIS_MISO, 1, 11)>,
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<NRF_PSEL(SPIS_MOSI, 1, 3)>,
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<NRF_PSEL(SPIS_CSN, 1, 1)>;
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};
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};
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spi20_sleep_alt: spi20_sleep_alt {
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group1 {
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psels = <NRF_PSEL(SPIS_SCK, 1, 8)>,
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<NRF_PSEL(SPIS_MISO, 1, 11)>,
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<NRF_PSEL(SPIS_MOSI, 1, 3)>,
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<NRF_PSEL(SPIS_CSN, 1, 1)>;
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low-power-enable;
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};
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};
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};
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dut_cnt_timer: &timer21 {
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status = "reserved";
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};
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dut_trig_timer: &timer22 {
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status = "reserved";
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};
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test_timer: &timer23 {
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status = "reserved";
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};
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dut_spi: &spi21 {
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status = "okay";
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pinctrl-0 = <&spi21_default_alt>;
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pinctrl-1 = <&spi21_sleep_alt>;
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pinctrl-names = "default", "sleep";
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overrun-character = <0x00>;
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cs-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
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zephyr,pm-device-runtime-auto;
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dut_spi_dt: test-spi-dev@0 {
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compatible = "vnd,spi-device";
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reg = <0>;
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spi-max-frequency = <DT_FREQ_M(16)>;
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};
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};
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dut_spis: &spi20 {
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compatible = "nordic,nrf-spis";
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status = "okay";
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def-char = <0x00>;
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pinctrl-0 = <&spi20_default_alt>;
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pinctrl-1 = <&spi20_sleep_alt>;
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pinctrl-names = "default", "sleep";
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/delete-property/ rx-delay-supported;
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/delete-property/ rx-delay;
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zephyr,pm-device-runtime-auto;
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};

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