nrf_security: cracen: Update cracen to support rename for LM20

Changed defines from 54l20 to 54lm20a

Signed-off-by: Dag Erik Gjørvad <[email protected]>

Author: degjorva

subsys/nrf_security/src/drivers/cracen/Kconfig

@@ -11,7 +11,7 @@ config CRACEN_HW_VERSION_BASE
 	def_bool SOC_SERIES_NRF54HX || SOC_NRF54L15 || SOC_NRF54L10 || SOC_NRF54L05
 
 config CRACEN_HW_VERSION_LITE
-	def_bool SOC_NRF54L20 || SOC_NRF54L09
+	def_bool SOC_NRF54LM20A || SOC_NRF54L09
 
 # Configure CRACEN_LOG_LEVEL
 module = CRACEN

subsys/nrf_security/src/drivers/cracen/cracenpsa/src/aead.c

@@ -336,7 +336,7 @@ psa_status_t cracen_aead_encrypt_setup(cracen_aead_operation_t *operation,
 				       const uint8_t *key_buffer, size_t key_buffer_size,
 				       psa_algorithm_t alg)
 {
-#ifdef CONFIG_SOC_NRF54L20
+#ifdef CONFIG_SOC_NRF54LM20A
 	return PSA_ERROR_NOT_SUPPORTED;
 #else
 	return setup(operation, CRACEN_ENCRYPT, attributes, key_buffer, key_buffer_size, alg);
@@ -348,7 +348,7 @@ psa_status_t cracen_aead_decrypt_setup(cracen_aead_operation_t *operation,
 				       const uint8_t *key_buffer, size_t key_buffer_size,
 				       psa_algorithm_t alg)
 {
-#ifdef CONFIG_SOC_NRF54L20
+#ifdef CONFIG_SOC_NRF54LM20A
 	return PSA_ERROR_NOT_SUPPORTED;
 #else
 	return setup(operation, CRACEN_DECRYPT, attributes, key_buffer, key_buffer_size, alg);
@@ -371,7 +371,7 @@ static psa_status_t set_nonce(cracen_aead_operation_t *operation, const uint8_t
 psa_status_t cracen_aead_set_nonce(cracen_aead_operation_t *operation, const uint8_t *nonce,
 				   size_t nonce_length)
 {
-#ifdef CONFIG_SOC_NRF54L20
+#ifdef CONFIG_SOC_NRF54LM20A
 	return PSA_ERROR_NOT_SUPPORTED;
 #else
 	psa_status_t status;
@@ -406,7 +406,7 @@ static void set_lengths(cracen_aead_operation_t *operation, size_t ad_length,
 psa_status_t cracen_aead_set_lengths(cracen_aead_operation_t *operation, size_t ad_length,
 				     size_t plaintext_length)
 {
-#ifdef CONFIG_SOC_NRF54L20
+#ifdef CONFIG_SOC_NRF54LM20A
 	return PSA_ERROR_NOT_SUPPORTED;
 #else
 	set_lengths(operation, ad_length, plaintext_length);
@@ -525,7 +525,7 @@ static psa_status_t cracen_aead_update_internal(cracen_aead_operation_t *operati
 psa_status_t cracen_aead_update_ad(cracen_aead_operation_t *operation, const uint8_t *input,
 				   size_t input_length)
 {
-#ifdef CONFIG_SOC_NRF54L20
+#ifdef CONFIG_SOC_NRF54LM20A
 	return PSA_ERROR_NOT_SUPPORTED;
 #else
 	return cracen_aead_update_internal(operation, input, input_length, NULL, 0, NULL, true);
@@ -536,7 +536,7 @@ psa_status_t cracen_aead_update(cracen_aead_operation_t *operation, const uint8_
 				size_t input_length, uint8_t *output, size_t output_size,
 				size_t *output_length)
 {
-#ifdef CONFIG_SOC_NRF54L20
+#ifdef CONFIG_SOC_NRF54LM20A
 	return PSA_ERROR_NOT_SUPPORTED;
 #else
 	/*
@@ -602,7 +602,7 @@ psa_status_t cracen_aead_finish(cracen_aead_operation_t *operation, uint8_t *cip
 				size_t ciphertext_size, size_t *ciphertext_length, uint8_t *tag,
 				size_t tag_size, size_t *tag_length)
 {
-#ifdef CONFIG_SOC_NRF54L20
+#ifdef CONFIG_SOC_NRF54LM20A
 	return PSA_ERROR_NOT_SUPPORTED;
 #else
 	psa_status_t status = PSA_ERROR_CORRUPTION_DETECTED;
@@ -653,7 +653,7 @@ psa_status_t cracen_aead_verify(cracen_aead_operation_t *operation, uint8_t *pla
 				size_t plaintext_size, size_t *plaintext_length, const uint8_t *tag,
 				size_t tag_length)
 {
-#ifdef CONFIG_SOC_NRF54L20
+#ifdef CONFIG_SOC_NRF54LM20A
 	return PSA_ERROR_NOT_SUPPORTED;
 #else
 	psa_status_t status = PSA_ERROR_CORRUPTION_DETECTED;

subsys/nrf_security/src/drivers/cracen/cracenpsa/src/cipher.c

@@ -327,7 +327,7 @@ static psa_status_t initialize_cipher(cracen_cipher_operation_t *operation)
 
 static bool is_multi_part_supported(psa_algorithm_t alg)
 {
-	if (IS_ENABLED(CONFIG_SOC_NRF54L20)) {
+	if (IS_ENABLED(CONFIG_SOC_NRF54LM20A)) {
 		switch (alg) {
 		case PSA_ALG_ECB_NO_PADDING:
 			return IS_ENABLED(PSA_NEED_CRACEN_ECB_NO_PADDING_AES);

subsys/nrf_security/src/drivers/cracen/silexpk/include/silexpk/iomem.h

@@ -46,7 +46,7 @@ void sx_wrpkmem(void *dst, const void *src, size_t sz);
  * Will be modified after this call
  * @param[in] input_byte The byte value to be written.
  */
-#ifndef CONFIG_SOC_NRF54L20
+#ifndef CONFIG_SOC_NRF54LM20A
 static inline void sx_wrpkmem_byte(void *dst, char input_byte)
 {
 	volatile char *d = (volatile char *)dst;

subsys/nrf_security/src/drivers/cracen/silexpk/src/iomem.c

@@ -7,7 +7,7 @@
 #include <stdint.h>
 #include <silexpk/iomem.h>
 
-#ifndef CONFIG_SOC_NRF54L20
+#ifndef CONFIG_SOC_NRF54LM20A
 
 #define PTR_ALIGNMENT(ptr, type)	(((uintptr_t)ptr) & (sizeof(type) - 1))
 #define IS_NATURAL_ALIGNED(ptr, type)	!PTR_ALIGNMENT(ptr, type)

subsys/nrf_security/src/drivers/cracen/silexpk/target/baremetal_ba414e_with_ik/pk_baremetal.c

@@ -23,7 +23,7 @@
 #include <security/cracen.h>
 #include <nrf_security_mutexes.h>
 
-#if CONFIG_CRACEN_HW_VERSION_LITE && !CONFIG_SOC_NRF54L20 && !CONFIG_SOC_NRF54L09
+#if CONFIG_CRACEN_HW_VERSION_LITE && !CONFIG_SOC_NRF54LM20A && !CONFIG_SOC_NRF54L09
 #error Check to see if the current board needs the IKG-PKE interrupt workaround or not, \
 then update this error
 #endif