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applications/nrf_desktop/configuration/nrf54lm20dk_nrf54lm20a_cpuapp Expand file tree Collapse file tree Original file line number Diff line number Diff line change 11/*
2- * Copyright (c) 2025 Nordic Semiconductor ASA
2+ * Copyright (c) 2025-2026 Nordic Semiconductor ASA
33 *
44 * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55 */
66
7+ #include "memory_map.dtsi"
78#include "app_common.dtsi"
89
9- /* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
10- &cpuapp_rram {
11- reg = <0x0 DT_SIZE_K(2036)>;
12- };
13-
1410/ {
1511 hid_dev_0: hid_dev_0 {
1612 compatible = "zephyr,hid-device";
Original file line number Diff line number Diff line change 11/*
2- * Copyright (c) 2025 Nordic Semiconductor ASA
2+ * Copyright (c) 2025-2026 Nordic Semiconductor ASA
33 *
44 * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55 */
66
7+ secondary_app_partition: &slot1_partition {};
8+
79/ {
810 /* Disable pwmleds and redefine them to align configuration with CAF LEDs requirements. */
911 /delete-node/ pwmleds;
Original file line number Diff line number Diff line change 11/*
2- * Copyright (c) 2025 Nordic Semiconductor ASA
2+ * Copyright (c) 2025-2026 Nordic Semiconductor ASA
33 *
44 * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55 */
66
7+ #include "memory_map_llvm.dtsi"
78#include "app_common.dtsi"
89
9- /* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
10- &cpuapp_rram {
11- reg = <0x0 DT_SIZE_K(2036)>;
12- };
13-
1410/ {
1511 hid_dev_0: hid_dev_0 {
1612 compatible = "zephyr,hid-device";
Original file line number Diff line number Diff line change 11/*
2- * Copyright (c) 2025 Nordic Semiconductor ASA
2+ * Copyright (c) 2025-2026 Nordic Semiconductor ASA
33 *
44 * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55 */
66
7+ #include "memory_map.dtsi"
78#include "app_common.dtsi"
89
9- /* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
10- &cpuapp_rram {
11- reg = <0x0 DT_SIZE_K(2036)>;
12- };
13-
1410/ {
1511 hid_dev_0: hid_dev_0 {
1612 compatible = "zephyr,hid-device";
Original file line number Diff line number Diff line change 11/*
2- * Copyright (c) 2025 Nordic Semiconductor ASA
2+ * Copyright (c) 2025-2026 Nordic Semiconductor ASA
33 *
44 * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55 */
66
7- /* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
8- &cpuapp_rram {
9- reg = <0x0 DT_SIZE_K(2036)>;
7+ #include "../../memory_map.dtsi"
8+
9+ /* The nRF54LM20 DK defines memory map using DTS.
10+ * Assign the bootloader partition to MCUboot image.
11+ */
12+ / {
13+ chosen {
14+ zephyr,code-partition = &boot_partition;
15+ };
1016};
Original file line number Diff line number Diff line change 11/*
2- * Copyright (c) 2025 Nordic Semiconductor ASA
2+ * Copyright (c) 2025-2026 Nordic Semiconductor ASA
33 *
44 * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55 */
66
7- /* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
8- &cpuapp_rram {
9- reg = <0x0 DT_SIZE_K(2036)>;
7+ #include "../../memory_map_llvm.dtsi"
8+
9+ /* The nRF54LM20 DK defines memory map using DTS.
10+ * Assign the bootloader partition to MCUboot image.
11+ */
12+ / {
13+ chosen {
14+ zephyr,code-partition = &boot_partition;
15+ };
1016};
Original file line number Diff line number Diff line change 11/*
2- * Copyright (c) 2025 Nordic Semiconductor ASA
2+ * Copyright (c) 2025-2026 Nordic Semiconductor ASA
33 *
44 * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55 */
66
7- /* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
8- &cpuapp_rram {
9- reg = <0x0 DT_SIZE_K(2036)>;
7+ #include "../../memory_map.dtsi"
8+
9+ /* The nRF54LM20 DK defines memory map using DTS.
10+ * Assign the bootloader partition to MCUboot image.
11+ */
12+ / {
13+ chosen {
14+ zephyr,code-partition = &boot_partition;
15+ };
1016};
Original file line number Diff line number Diff line change 11#
2- # Copyright (c) 2025 Nordic Semiconductor ASA
2+ # Copyright (c) 2025-2026 Nordic Semiconductor ASA
33#
44# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55#
@@ -8,7 +8,6 @@ CONFIG_SIZE_OPTIMIZATIONS=y
88CONFIG_HW_STACK_PROTECTION=y
99
1010CONFIG_MAIN_STACK_SIZE=10240
11- CONFIG_BOOT_MAX_IMG_SECTORS=256
1211CONFIG_BOOT_BOOTSTRAP=n
1312
1413CONFIG_BOOT_VERSION_CMP_USE_BUILD_NUMBER=y
Original file line number Diff line number Diff line change 11#
2- # Copyright (c) 2025 Nordic Semiconductor ASA
2+ # Copyright (c) 2025-2026 Nordic Semiconductor ASA
33#
44# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55#
@@ -8,7 +8,6 @@ CONFIG_SIZE_OPTIMIZATIONS_AGGRESSIVE=y
88CONFIG_HW_STACK_PROTECTION=y
99
1010CONFIG_MAIN_STACK_SIZE=10240
11- CONFIG_BOOT_MAX_IMG_SECTORS=256
1211CONFIG_BOOT_BOOTSTRAP=n
1312
1413CONFIG_BOOT_VERSION_CMP_USE_BUILD_NUMBER=y
Original file line number Diff line number Diff line change 11#
2- # Copyright (c) 2025 Nordic Semiconductor ASA
2+ # Copyright (c) 2025-2026 Nordic Semiconductor ASA
33#
44# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
55#
@@ -8,8 +8,6 @@ CONFIG_SIZE_OPTIMIZATIONS=y
88CONFIG_HW_STACK_PROTECTION=y
99
1010CONFIG_MAIN_STACK_SIZE=10240
11-
12- CONFIG_BOOT_MAX_IMG_SECTORS=256
1311CONFIG_BOOT_BOOTSTRAP=n
1412
1513CONFIG_BOOT_VERSION_CMP_USE_BUILD_NUMBER=y
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