softperipheral: rev ad238bfc1d4c93a5fee8e802ac3026ab77740c4d

Holding transfers not supported.
Enforcing data swap and reordering units to match.
Alternative deactivation and uninit sequence for nRF54H20.

Signed-off-by: Luis David Lopez <[email protected]>

Author: lopeztel

softperipheral/sQSPI/include/nrf54h20/sqspi_firmware_v0.1.0.h

@@ -800,7 +800,7 @@ const uint8_t sqspi_firmware_bin[] = {
   0xf5, 0xff, 0xb7, 0x07, 0x00, 0x10, 0x73, 0xb0, 0x57, 0x7e, 0x82, 0x80,
   0xb7, 0x47, 0x89, 0x2f, 0x05, 0x47, 0x23, 0xac, 0xe7, 0xe2, 0x1c, 0x41,
   0xed, 0x8f, 0x99, 0xc7, 0xb7, 0x07, 0x00, 0x10, 0x73, 0xa0, 0x27, 0x7e,
-  0x73, 0xb0, 0x57, 0x7e, 0x82, 0x80, 0x73, 0xd0, 0x17, 0x7c, 0x73, 0x60,
+  0x73, 0xb0, 0x57, 0x7e, 0x82, 0x80, 0x73, 0xd0, 0x12, 0x7c, 0x73, 0x60,
   0x04, 0x30, 0x73, 0x00, 0x50, 0x10, 0x01, 0x00, 0x01, 0x00, 0x82, 0x80,
   0x37, 0x17, 0x00, 0xf0, 0x3c, 0x53, 0xb7, 0x06, 0x00, 0x01, 0x93, 0xe7,
   0x07, 0x10, 0x3c, 0xd3, 0x73, 0x90, 0x16, 0x7e, 0x82, 0x80, 0x37, 0x17,

softperipheral/sQSPI/src/nrfx_qspi2.c

@@ -117,22 +117,15 @@ nrfx_err_t nrfx_qspi2_init(const nrfx_qspi2_t * p_qspi, const nrfx_qspi2_cfg_t *
     p_cb->transfer_in_progress = false;
     p_cb->prepared_pending     = false;
 
-    //Formatting default values
     //Formatting default values
     p_cb->conf.format.pixels   = 0;
     p_cb->conf.format.dfs      = 7;
     p_cb->conf.ctrlr0.dfs      = 7;
-    p_cb->conf.format.bpp      = 0;
+    p_cb->conf.format.bpp      = 8;
     p_cb->conf.format.padding  = 0;
     p_cb->conf.format.bitorder = 0;
     p_cb->conf.format.cilen    = 0;
 
-    nrf_qspi2_format_dfs(p_qspi->p_reg, (uint8_t)(p_cb->conf.format.dfs - 1U));
-    nrf_qspi2_core_dr_x(p_qspi->p_reg, (uint32_t)(32 - p_cb->conf.format.dfs), 22); //Hijacking DR[22] as red_dfs
-    nrf_qspi2_format_bpp(p_qspi->p_reg, (uint8_t)(p_cb->conf.format.bpp));
-    nrf_qspi2_format_bitorder(p_qspi->p_reg, (int)p_cb->conf.format.bitorder,
-                              (int)p_cb->conf.format.bitorder);
-
     // Set all pins to unused.
     for (int i = 0; i < 6; i++)
     {
@@ -241,6 +234,12 @@ nrfx_err_t nrfx_qspi2_init(const nrfx_qspi2_t * p_qspi, const nrfx_qspi2_cfg_t *
         }
     }
 
+    nrf_qspi2_format_dfs(p_qspi->p_reg, (uint8_t)(p_cb->conf.format.dfs));
+    nrf_qspi2_core_dr_x(p_qspi->p_reg, (uint32_t)(32 - p_cb->conf.format.padding), 22); //Hijacking DR[22] as red_dfs
+    nrf_qspi2_format_bpp(p_qspi->p_reg, (uint8_t)(p_cb->conf.format.bpp));
+    nrf_qspi2_format_bitorder(p_qspi->p_reg, (int)p_cb->conf.format.bitorder,
+                              (int)p_cb->conf.format.bitorder);
+
     NRFX_IRQ_PRIORITY_SET(SP_VPR_IRQn, 1);
     NRFX_IRQ_ENABLE(SP_VPR_IRQn);
 
@@ -298,6 +297,19 @@ void nrfx_qspi2_uninit(const nrfx_qspi2_t * p_qspi)
 
     // Stop VPR.
     nrf_vpr_cpurun_set(NRF_VPR, false);
+#if defined(NRF54H20_XXAA)
+    // Reset VPR.
+    nrf_vpr_debugif_dmcontrol_mask_set(NRF_VPR,
+                                       (VPR_DEBUGIF_DMCONTROL_NDMRESET_Active
+                                        << VPR_DEBUGIF_DMCONTROL_NDMRESET_Pos |
+                                        VPR_DEBUGIF_DMCONTROL_DMACTIVE_Enabled
+                                        << VPR_DEBUGIF_DMCONTROL_DMACTIVE_Pos));
+    nrf_vpr_debugif_dmcontrol_mask_set(NRF_VPR,
+                                       (VPR_DEBUGIF_DMCONTROL_NDMRESET_Inactive
+                                        << VPR_DEBUGIF_DMCONTROL_NDMRESET_Pos |
+                                        VPR_DEBUGIF_DMCONTROL_DMACTIVE_Disabled
+                                        << VPR_DEBUGIF_DMCONTROL_DMACTIVE_Pos));
+#endif
 
     p_cb->state = NRFX_DRV_STATE_UNINITIALIZED;
 }
@@ -432,6 +444,10 @@ nrfx_err_t nrfx_qspi2_dev_data_fmt_set(const nrfx_qspi2_t *    p_qspi,
     {
         return NRFX_ERROR_INVALID_PARAM;
     }
+    if (p_data_fmt->data_bit_reorder_unit != p_data_fmt->data_swap_unit)
+    {
+        return NRFX_ERROR_INVALID_PARAM;
+    }
     if (p_data_fmt->data_padding != 0)
     {
         if (p_data_fmt->data_container + p_data_fmt->data_padding != 32)
@@ -630,7 +646,7 @@ nrfx_err_t nrfx_qspi2_xfer(const nrfx_qspi2_t *      p_qspi,
 {
     if (flags == NRFX_QSPI2_FLAG_HOLD_XFER)
     {
-        return nrfx_qspi2_xfer_prepare(p_qspi, p_xfer, xfer_count);
+        return NRFX_ERROR_NOT_SUPPORTED;
     }
 
     qspi2_control_block_t * p_cb = &m_cb[p_qspi->drv_inst_idx];
@@ -646,7 +662,6 @@ nrfx_err_t nrfx_qspi2_xfer(const nrfx_qspi2_t *      p_qspi,
 
     if (retval == NRFX_SUCCESS)
     {
-
         nrf_qspi2_core_enable(p_qspi->p_reg);
         __ASB(p_qspi->p_reg);