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57 | 57 | /* Temperature based calibration params */ |
58 | 58 | #define NRF_WIFI_DEF_PHY_TEMP_CALIB (NRF_WIFI_PHY_CALIB_FLAG_RXDC |\ |
59 | 59 | NRF_WIFI_PHY_CALIB_FLAG_TXDC |\ |
| 60 | + NRF_WIFI_PHY_CALIB_FLAG_ENHANCED_TXDC |\ |
60 | 61 | NRF_WIFI_PHY_CALIB_FLAG_RXIQ |\ |
61 | 62 | NRF_WIFI_PHY_CALIB_FLAG_TXIQ |\ |
62 | 63 | NRF_WIFI_PHY_CALIB_FLAG_TXPOW |\ |
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88 | 89 | #define RX_GAIN_OFFSET_HB_MID_CHAN 0 |
89 | 90 | #define RX_GAIN_OFFSET_HB_HIGH_CHAN 0 |
90 | 91 |
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91 | | -/** Systematic error between set power and measured power in dBm */ |
92 | | -#define SYSTEM_OFFSET_LB 3 |
93 | | -#define SYSTEM_OFFSET_HB_CHAN_LOW 3 |
94 | | -#define SYSTEM_OFFSET_HB_CHAN_MID 3 |
95 | | -#define SYSTEM_OFFSET_HB_CHAN_HIGH 3 |
| 92 | + |
96 | 93 |
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97 | 94 | /** End of package independent params */ |
98 | 95 |
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102 | 99 | /** XO adjustment value */ |
103 | 100 | #define QFN_XO_VAL 0x2A |
104 | 101 |
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| 102 | +/** Systematic error between set power and measured power in dBm */ |
| 103 | +#define QFN_SYSTEM_OFFSET_LB 3 |
| 104 | +#define QFN_SYSTEM_OFFSET_HB_CHAN_LOW 3 |
| 105 | +#define QFN_SYSTEM_OFFSET_HB_CHAN_MID 3 |
| 106 | +#define QFN_SYSTEM_OFFSET_HB_CHAN_HIGH 3 |
| 107 | + |
105 | 108 | /** Max TX power allowed for DSSS and OFDM in 2.4GHz band */ |
106 | 109 | #define QFN_MAX_TX_PWR_DSSS 0x54 |
107 | 110 | #define QFN_MAX_TX_PWR_LB_MCS7 0x40 |
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154 | 157 | /** XO adjustment value */ |
155 | 158 | #define CSP_XO_VAL 0x2A |
156 | 159 |
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| 160 | +/** Systematic error between set power and measured power in dBm */ |
| 161 | +#define CSP_SYSTEM_OFFSET_LB 5 |
| 162 | +#define CSP_SYSTEM_OFFSET_HB_CHAN_LOW 5 |
| 163 | +#define CSP_SYSTEM_OFFSET_HB_CHAN_MID 5 |
| 164 | +#define CSP_SYSTEM_OFFSET_HB_CHAN_HIGH 5 |
157 | 165 | /** Max TX power allowed for DSSS and OFDM in 2.4GHz band */ |
158 | | -#define CSP_MAX_TX_PWR_DSSS 0x48 |
159 | | -#define CSP_MAX_TX_PWR_LB_MCS7 0x44 |
160 | | -#define CSP_MAX_TX_PWR_LB_MCS0 0x44 |
| 166 | +#define CSP_MAX_TX_PWR_DSSS 0x40 |
| 167 | +#define CSP_MAX_TX_PWR_LB_MCS7 0x3C |
| 168 | +#define CSP_MAX_TX_PWR_LB_MCS0 0x3C |
161 | 169 |
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162 | 170 | /** Max TX power allowed for MCS7 for channels in the range, |
163 | 171 | * 36 to 64, 96 to 132 and 136 to 177 |
164 | 172 | */ |
165 | | -#define CSP_MAX_TX_PWR_HB_LOW_CHAN_MCS7 0x3C |
166 | | -#define CSP_MAX_TX_PWR_HB_MID_CHAN_MCS7 0x3C |
167 | | -#define CSP_MAX_TX_PWR_HB_HIGH_CHAN_MCS7 0x3C |
| 173 | +#define CSP_MAX_TX_PWR_HB_LOW_CHAN_MCS7 0x34 |
| 174 | +#define CSP_MAX_TX_PWR_HB_MID_CHAN_MCS7 0x34 |
| 175 | +#define CSP_MAX_TX_PWR_HB_HIGH_CHAN_MCS7 0x34 |
168 | 176 |
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169 | 177 | /** Max TX power allowed for MCS0 for channels in the range, |
170 | 178 | * 36 to 64, 96 to 132 and 136 to 177 |
171 | 179 | */ |
172 | | -#define CSP_MAX_TX_PWR_HB_LOW_CHAN_MCS0 0x3C |
173 | | -#define CSP_MAX_TX_PWR_HB_MID_CHAN_MCS0 0x3C |
174 | | -#define CSP_MAX_TX_PWR_HB_HIGH_CHAN_MCS0 0x3C |
| 180 | +#define CSP_MAX_TX_PWR_HB_LOW_CHAN_MCS0 0x34 |
| 181 | +#define CSP_MAX_TX_PWR_HB_MID_CHAN_MCS0 0x34 |
| 182 | +#define CSP_MAX_TX_PWR_HB_HIGH_CHAN_MCS0 0x34 |
175 | 183 |
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176 | 184 | /** Max chip temperature at which the TX power backoff to be applied. */ |
177 | 185 | #define CSP_MAX_CHIP_TEMP 0x43 |
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