From 547d444a12b5bf1b509b0e45a7634a94410c8acc Mon Sep 17 00:00:00 2001 From: Marcin Szymczyk Date: Tue, 14 Oct 2025 12:36:33 +0200 Subject: [PATCH 01/11] softdevice_controller: align to nrfx 4.0 MDK should not be included directly, but via nrfx.h Signed-off-by: Marcin Szymczyk --- softdevice_controller/include/sdc.h | 2 +- .../include/sdc_hci_cmd_controller_baseband.h | 2 +- .../include/sdc_hci_cmd_info_params.h | 2 +- .../include/sdc_hci_cmd_le.h | 2 +- .../include/sdc_hci_cmd_link_control.h | 2 +- .../include/sdc_hci_cmd_status_params.h | 2 +- softdevice_controller/include/sdc_hci_evt.h | 2 +- softdevice_controller/include/sdc_hci_vs.h | 2 +- softdevice_controller/include/sdc_soc.h | 36 +++++++++++++------ 9 files changed, 33 insertions(+), 19 deletions(-) diff --git a/softdevice_controller/include/sdc.h b/softdevice_controller/include/sdc.h index f457ef15d0..c1aa9c80fd 100644 --- a/softdevice_controller/include/sdc.h +++ b/softdevice_controller/include/sdc.h @@ -26,7 +26,7 @@ extern "C" { #include #include -#include "nrf.h" +#include "nrfx.h" #include "nrf_errno.h" /** @brief Default resource configuration tag. */ diff --git a/softdevice_controller/include/sdc_hci_cmd_controller_baseband.h b/softdevice_controller/include/sdc_hci_cmd_controller_baseband.h index 71cfe3cdd9..dbe8a2f1bc 100644 --- a/softdevice_controller/include/sdc_hci_cmd_controller_baseband.h +++ b/softdevice_controller/include/sdc_hci_cmd_controller_baseband.h @@ -25,7 +25,7 @@ extern "C" { #endif #include -#include +#include /** * @defgroup HCI_TYPES Types diff --git a/softdevice_controller/include/sdc_hci_cmd_info_params.h b/softdevice_controller/include/sdc_hci_cmd_info_params.h index c3492ab810..41ecce4eae 100644 --- a/softdevice_controller/include/sdc_hci_cmd_info_params.h +++ b/softdevice_controller/include/sdc_hci_cmd_info_params.h @@ -25,7 +25,7 @@ extern "C" { #endif #include -#include +#include /** * @defgroup HCI_TYPES Types diff --git a/softdevice_controller/include/sdc_hci_cmd_le.h b/softdevice_controller/include/sdc_hci_cmd_le.h index 2ec2e68eeb..4872cb5283 100644 --- a/softdevice_controller/include/sdc_hci_cmd_le.h +++ b/softdevice_controller/include/sdc_hci_cmd_le.h @@ -25,7 +25,7 @@ extern "C" { #endif #include -#include +#include /** * @defgroup HCI_TYPES Types diff --git a/softdevice_controller/include/sdc_hci_cmd_link_control.h b/softdevice_controller/include/sdc_hci_cmd_link_control.h index c8ecd258ba..91783a1e9c 100644 --- a/softdevice_controller/include/sdc_hci_cmd_link_control.h +++ b/softdevice_controller/include/sdc_hci_cmd_link_control.h @@ -25,7 +25,7 @@ extern "C" { #endif #include -#include +#include /** * @defgroup HCI_TYPES Types diff --git a/softdevice_controller/include/sdc_hci_cmd_status_params.h b/softdevice_controller/include/sdc_hci_cmd_status_params.h index 403b61d2de..b2a01c6b60 100644 --- a/softdevice_controller/include/sdc_hci_cmd_status_params.h +++ b/softdevice_controller/include/sdc_hci_cmd_status_params.h @@ -25,7 +25,7 @@ extern "C" { #endif #include -#include +#include /** * @defgroup HCI_TYPES Types diff --git a/softdevice_controller/include/sdc_hci_evt.h b/softdevice_controller/include/sdc_hci_evt.h index 60ac4bfa8f..b11c9c046e 100644 --- a/softdevice_controller/include/sdc_hci_evt.h +++ b/softdevice_controller/include/sdc_hci_evt.h @@ -21,7 +21,7 @@ extern "C" { #endif #include -#include +#include /** * @defgroup HCI_TYPES Types diff --git a/softdevice_controller/include/sdc_hci_vs.h b/softdevice_controller/include/sdc_hci_vs.h index 62608b7891..5bdb056704 100644 --- a/softdevice_controller/include/sdc_hci_vs.h +++ b/softdevice_controller/include/sdc_hci_vs.h @@ -27,7 +27,7 @@ extern "C" { #endif #include -#include +#include /** * @defgroup HCI_TYPES Types diff --git a/softdevice_controller/include/sdc_soc.h b/softdevice_controller/include/sdc_soc.h index 67b7c4e44a..3d0160c07b 100644 --- a/softdevice_controller/include/sdc_soc.h +++ b/softdevice_controller/include/sdc_soc.h @@ -28,24 +28,38 @@ extern "C" { #include #include -#include "nrf.h" + +#define SDC_NRF52_PPI_CHANNELS_USED_MASK (0xfffe0000) +#define SDC_NRF53_DPPI_CHANNELS_USED_MASK (0x00001ff8) +#define SDC_NRF54L_DPPIC10_CHANNELS_USED_MASK (0x00000ffe) +#define SDC_NRF54L_DPPIC00_CHANNELS_USED_MASK (0x0000000a) +#define SDC_NRF54L_PPIB00_CHANNELS_USED_MASK (0x0000000f) +#define SDC_NRF54L_PPIB10_CHANNELS_USED_MASK (0x0000000f) +#define SDC_NRF54H_DPPIC020_CHANNELS_USED_MASK (0x00000ffe) +#define SDC_NRF54H_DPPIC030_CHANNELS_USED_MASK (0x0000000a) +#define SDC_NRF54H_PPIB020_CHANNELS_USED_MASK (0x0000000f) +#define SDC_NRF54H_PPIB030_CHANNELS_USED_MASK (0x0000000f) + +#if !defined(__ZEPHYR__) +#include "nrfx.h" #if defined(NRF52_SERIES) /* PPI channels 17 - 31, for the nRF52 Series */ - #define SDC_PPI_CHANNELS_USED_MASK (0xfffe0000) + #define SDC_PPI_CHANNELS_USED_MASK SDC_NRF52_PPI_CHANNELS_USED_MASK #elif defined(NRF53_SERIES) /* PPI channels 3 - 12, for the nRF53 Series */ - #define SDC_DPPI_CHANNELS_USED_MASK (0x00001ff8) + #define SDC_DPPI_CHANNELS_USED_MASK SDC_NRF53_DPPI_CHANNELS_USED_MASK #elif defined(LUMOS_XXAA) - #define SDC_DPPIC10_CHANNELS_USED_MASK (0x00000ffe) - #define SDC_DPPIC00_CHANNELS_USED_MASK (0x0000000a) - #define SDC_PPIB00_CHANNELS_USED_MASK (0x0000000f) - #define SDC_PPIB10_CHANNELS_USED_MASK (0x0000000f) + #define SDC_DPPIC10_CHANNELS_USED_MASK SDC_NRF54L_DPPIC10_CHANNELS_USED_MASK + #define SDC_DPPIC00_CHANNELS_USED_MASK SDC_NRF54L_DPPIC00_CHANNELS_USED_MASK + #define SDC_PPIB00_CHANNELS_USED_MASK SDC_NRF54L_PPIB00_CHANNELS_USED_MASK + #define SDC_PPIB10_CHANNELS_USED_MASK SDC_NRF54L_PPIB10_CHANNELS_USED_MASK #elif defined(NRF54H_SERIES) || defined(GRTC_PRESENT) - #define SDC_DPPIC020_CHANNELS_USED_MASK (0x00000ffe) - #define SDC_DPPIC030_CHANNELS_USED_MASK (0x0000000a) - #define SDC_PPIB020_CHANNELS_USED_MASK (0x0000000f) - #define SDC_PPIB030_CHANNELS_USED_MASK (0x0000000f) + #define SDC_DPPIC020_CHANNELS_USED_MASK SDC_NRF54H_DPPIC020_CHANNELS_USED_MASK + #define SDC_DPPIC030_CHANNELS_USED_MASK SDC_NRF54H_DPPIC030_CHANNELS_USED_MASK + #define SDC_PPIB020_CHANNELS_USED_MASK SDC_NRF54H_PPIB020_CHANNELS_USED_MASK + #define SDC_PPIB030_CHANNELS_USED_MASK SDC_NRF54H_PPIB030_CHANNELS_USED_MASK +#endif #endif /** From 17bd9a5517bb49f291d5a598d55fd4ec4f86a81b Mon Sep 17 00:00:00 2001 From: Marcin Szymczyk Date: Tue, 14 Oct 2025 16:11:49 +0200 Subject: [PATCH 02/11] mpsl: align to nrfx 4.0 MDK should not be included directly, but via nrfx.h Signed-off-by: Marcin Szymczyk --- mpsl/fem/include/mpsl_fem_config_common.h | 2 +- .../include/protocol/mpsl_fem_protocol_api.h | 3 +- .../include/mpsl_fem_config_nrf21540_gpio.h | 2 +- .../mpsl_fem_config_nrf21540_gpio_spi.h | 2 +- .../nrf2220/include/mpsl_fem_config_nrf2220.h | 2 +- .../nrf2240/include/mpsl_fem_config_nrf2240.h | 2 +- .../mpsl_fem_nrf22xx_twi_config_common.h | 2 +- .../include/mpsl_fem_config_simple_gpio.h | 2 +- mpsl/include/mpsl.h | 3 +- mpsl/include/mpsl_clock.h | 3 +- mpsl/include/mpsl_hwres.h | 57 +++++++++++-------- mpsl/include/mpsl_timeslot.h | 3 +- .../include/protocol/mpsl_dppi_protocol_api.h | 2 +- 13 files changed, 46 insertions(+), 39 deletions(-) diff --git a/mpsl/fem/include/mpsl_fem_config_common.h b/mpsl/fem/include/mpsl_fem_config_common.h index 5777e41210..3175f33f1a 100644 --- a/mpsl/fem/include/mpsl_fem_config_common.h +++ b/mpsl/fem/include/mpsl_fem_config_common.h @@ -19,7 +19,7 @@ #include #include -#include +#include #ifdef __cplusplus extern "C" { diff --git a/mpsl/fem/include/protocol/mpsl_fem_protocol_api.h b/mpsl/fem/include/protocol/mpsl_fem_protocol_api.h index 1fef5a7911..10bb41a7b9 100644 --- a/mpsl/fem/include/protocol/mpsl_fem_protocol_api.h +++ b/mpsl/fem/include/protocol/mpsl_fem_protocol_api.h @@ -23,8 +23,7 @@ #include #include -#include -#include +#include #include "nrf_errno.h" #include "mpsl_tx_power.h" #include "mpsl_fem_types.h" diff --git a/mpsl/fem/nrf21540_gpio/include/mpsl_fem_config_nrf21540_gpio.h b/mpsl/fem/nrf21540_gpio/include/mpsl_fem_config_nrf21540_gpio.h index 4904b6b4fd..32b6d9cb91 100644 --- a/mpsl/fem/nrf21540_gpio/include/mpsl_fem_config_nrf21540_gpio.h +++ b/mpsl/fem/nrf21540_gpio/include/mpsl_fem_config_nrf21540_gpio.h @@ -20,7 +20,7 @@ #include #include "mpsl_fem_config_common.h" #include "mpsl_fem_config_nrf21540_common.h" -#include "nrf.h" +#include "nrfx.h" #ifdef __cplusplus extern "C" { diff --git a/mpsl/fem/nrf21540_gpio_spi/include/mpsl_fem_config_nrf21540_gpio_spi.h b/mpsl/fem/nrf21540_gpio_spi/include/mpsl_fem_config_nrf21540_gpio_spi.h index fa4c95f670..526ffc7b31 100644 --- a/mpsl/fem/nrf21540_gpio_spi/include/mpsl_fem_config_nrf21540_gpio_spi.h +++ b/mpsl/fem/nrf21540_gpio_spi/include/mpsl_fem_config_nrf21540_gpio_spi.h @@ -20,7 +20,7 @@ #include #include "mpsl_fem_config_common.h" #include "mpsl_fem_config_nrf21540_common.h" -#include "nrf.h" +#include "nrfx.h" #ifdef __cplusplus extern "C" { diff --git a/mpsl/fem/nrf2220/include/mpsl_fem_config_nrf2220.h b/mpsl/fem/nrf2220/include/mpsl_fem_config_nrf2220.h index b672fd6f3e..b7e1730fa4 100644 --- a/mpsl/fem/nrf2220/include/mpsl_fem_config_nrf2220.h +++ b/mpsl/fem/nrf2220/include/mpsl_fem_config_nrf2220.h @@ -21,7 +21,7 @@ #include "mpsl_fem_config_common.h" #include "mpsl_fem_nrf22xx_twi_config_common.h" -#include "nrf.h" +#include "nrfx.h" #ifdef __cplusplus extern "C" { diff --git a/mpsl/fem/nrf2240/include/mpsl_fem_config_nrf2240.h b/mpsl/fem/nrf2240/include/mpsl_fem_config_nrf2240.h index 0d2fcde236..424ae6b435 100644 --- a/mpsl/fem/nrf2240/include/mpsl_fem_config_nrf2240.h +++ b/mpsl/fem/nrf2240/include/mpsl_fem_config_nrf2240.h @@ -21,7 +21,7 @@ #include "mpsl_fem_config_common.h" #include "mpsl_fem_nrf22xx_twi_config_common.h" -#include "nrf.h" +#include "nrfx.h" #ifdef __cplusplus extern "C" { diff --git a/mpsl/fem/nrf22xx/include/mpsl_fem_nrf22xx_twi_config_common.h b/mpsl/fem/nrf22xx/include/mpsl_fem_nrf22xx_twi_config_common.h index fdd2dde889..07e5df9191 100644 --- a/mpsl/fem/nrf22xx/include/mpsl_fem_nrf22xx_twi_config_common.h +++ b/mpsl/fem/nrf22xx/include/mpsl_fem_nrf22xx_twi_config_common.h @@ -20,7 +20,7 @@ #include #include -#include +#include #include #include diff --git a/mpsl/fem/simple_gpio/include/mpsl_fem_config_simple_gpio.h b/mpsl/fem/simple_gpio/include/mpsl_fem_config_simple_gpio.h index 565a0c57ba..3b5ea19b8e 100644 --- a/mpsl/fem/simple_gpio/include/mpsl_fem_config_simple_gpio.h +++ b/mpsl/fem/simple_gpio/include/mpsl_fem_config_simple_gpio.h @@ -19,7 +19,7 @@ #include #include #include "mpsl_fem_config_common.h" -#include "nrf.h" +#include "nrfx.h" #ifdef __cplusplus extern "C" { diff --git a/mpsl/include/mpsl.h b/mpsl/include/mpsl.h index 0424c2e1d4..8bec48bb34 100644 --- a/mpsl/include/mpsl.h +++ b/mpsl/include/mpsl.h @@ -22,8 +22,7 @@ extern "C" { #include #include -#include "nrf.h" -#include "nrf_peripherals.h" +#include "nrfx.h" #include "nrf_errno.h" #include "mpsl_clock.h" #include "mpsl_hwres.h" diff --git a/mpsl/include/mpsl_clock.h b/mpsl/include/mpsl_clock.h index b5f53367b6..549bf92975 100644 --- a/mpsl/include/mpsl_clock.h +++ b/mpsl/include/mpsl_clock.h @@ -23,8 +23,7 @@ extern "C" { #include #include -#include "nrf.h" -#include "nrf_errno.h" +#include "nrfx.h" #if !defined (NRF54H_SERIES) && !defined (NRF92_SERIES) #include "hal/nrf_clock.h" #endif /* !NRF54H20_XXAA && !NRF92H20_XXAA */ diff --git a/mpsl/include/mpsl_hwres.h b/mpsl/include/mpsl_hwres.h index 3063b847da..c461414f80 100644 --- a/mpsl/include/mpsl_hwres.h +++ b/mpsl/include/mpsl_hwres.h @@ -19,8 +19,6 @@ #include #include -#include "nrf.h" -#include "nrf_peripherals.h" #include "mpsl_hwres_ppi.h" #ifdef __cplusplus @@ -28,37 +26,50 @@ extern "C" { #endif /* Reserved (D)PPI, PPIB and IPCT resources for the supported platforms. */ +/* This corresponds to the PPI channels 19, 30, and 31. */ +#define MPSL_NRF52_PPI_CHANNELS_USED_MASK (0xc0080000) +/* This corresponds to the DPPI channels 0, 1, and 2. */ +#define MPSL_NRF53_DPPIC_CHANNELS_USED_MASK (0x00000007) +#define MPSL_NRF54L_DPPIC10_CHANNELS_USED_MASK (0x00000001) +#define MPSL_NRF54L_DPPIC20_CHANNELS_USED_MASK (0x00000001) +#define MPSL_NRF54L_PPIB11_CHANNELS_USED_MASK (0x00000001) +#define MPSL_NRF54L_PPIB21_CHANNELS_USED_MASK (0x00000001) +#define MPSL_NRF54H_DPPIC020_CHANNELS_USED_MASK (0x00000001) +#define MPSL_NRF54H_IPCT130_CHANNELS_USED_MASK (0x00000001) + +#if !defined(__ZEPHYR__) +#include "nrfx.h" + #if defined(NRF52_SERIES) - #define MPSL_RESERVED_PPI_CHANNELS ((1UL << 19) | (1UL << 30) | (1UL << 31)) - /* This corresponds to the PPI channels 19, 30, and 31. */ - #define MPSL_PPI_CHANNELS_USED_MASK (0xc0080000) +#define MPSL_RESERVED_PPI_CHANNELS ((1UL << 19) | (1UL << 30) | (1UL << 31)) +#define MPSL_PPI_CHANNELS_USED_MASK MPSL_NRF52_PPI_CHANNELS_USED_MASK #elif defined(NRF53_SERIES) - #define MPSL_RESERVED_PPI_CHANNELS ((1UL << 0) | (1UL << 1) | (1UL << 2)) - /* This corresponds to the DPPI channels 0, 1, and 2. */ - #define MPSL_DPPIC_CHANNELS_USED_MASK (0x00000007) -#elif defined(LUMOS_XXAA) - #define MPSL_RESERVED_PPI_CHANNELS (1UL << 0) - #define MPSL_DPPIC10_CHANNELS_USED_MASK (0x00000001) - #define MPSL_DPPIC20_CHANNELS_USED_MASK (0x00000001) - #define MPSL_PPIB11_CHANNELS_USED_MASK (0x00000001) - #define MPSL_PPIB21_CHANNELS_USED_MASK (0x00000001) +#define MPSL_RESERVED_PPI_CHANNELS ((1UL << 0) | (1UL << 1) | (1UL << 2)) +#define MPSL_DPPIC_CHANNELS_USED_MASK MPSL_NRF53_DPPIC_CHANNELS_USED_MASK +#elif defined(NRF54L_SERIES) +#define MPSL_RESERVED_PPI_CHANNELS (1UL << 0) +#define MPSL_DPPIC10_CHANNELS_USED_MASK MPSL_NRF54L_DPPIC10_CHANNELS_USED_MASK +#define MPSL_DPPIC20_CHANNELS_USED_MASK MPSL_NRF54L_DPPIC20_CHANNELS_USED_MASK +#define MPSL_PPIB11_CHANNELS_USED_MASK MPSL_NRF54L_PPIB11_CHANNELS_USED_MASK +#define MPSL_PPIB21_CHANNELS_USED_MASK MPSL_NRF54L_PPIB21_CHANNELS_USED_MASK #elif defined(NRF54H_SERIES) || defined(GRTC_PRESENT) - #define MPSL_RESERVED_PPI_CHANNELS (1UL << 0) - #define MPSL_DPPIC020_CHANNELS_USED_MASK (0x00000001) - #define MPSL_IPCT130_CHANNELS_USED_MASK (0x00000001) +#define MPSL_RESERVED_PPI_CHANNELS (1UL << 0) +#define MPSL_DPPIC020_CHANNELS_USED_MASK MPSL_NRF54H_DPPIC020_CHANNELS_USED_MASK +#define MPSL_IPCT130_CHANNELS_USED_MASK MPSL_NRF54H_IPCT130_CHANNELS_USED_MASK #else - #error Unknown NRF series. +#error Unknown NRF series. #endif /* Defines which timer is being used by the MPSL implementation */ #if defined(NRF52_SERIES) - #define MPSL_TIMER0 NRF_TIMER0 + #define MPSL_TIMER0 NRF_TIMER0 #elif defined(NRF53_SERIES) - #define MPSL_TIMER0 NRF_TIMER0_NS -#elif defined(LUMOS_XXAA) - #define MPSL_TIMER0 NRF_TIMER10 + #define MPSL_TIMER0 NRF_TIMER0_NS +#elif defined(NRF54L_SERIES) + #define MPSL_TIMER0 NRF_TIMER10 #else - #define MPSL_TIMER0 NRF_TIMER020 + #define MPSL_TIMER0 NRF_TIMER020 +#endif #endif #ifdef __cplusplus diff --git a/mpsl/include/mpsl_timeslot.h b/mpsl/include/mpsl_timeslot.h index 1d4fb06d4e..da2fc3ff0e 100644 --- a/mpsl/include/mpsl_timeslot.h +++ b/mpsl/include/mpsl_timeslot.h @@ -25,8 +25,7 @@ extern "C" { #endif #include -#include "nrf.h" -#include "nrf_peripherals.h" +#include "nrfx.h" #include "nrf_errno.h" /** @brief The shortest allowed timeslot event in microseconds. */ diff --git a/mpsl/include/protocol/mpsl_dppi_protocol_api.h b/mpsl/include/protocol/mpsl_dppi_protocol_api.h index 38adc0ab0d..dfd42c5687 100644 --- a/mpsl/include/protocol/mpsl_dppi_protocol_api.h +++ b/mpsl/include/protocol/mpsl_dppi_protocol_api.h @@ -7,7 +7,7 @@ #ifndef MPSL_DPPI_PROTOCOL_API_H__ #define MPSL_DPPI_PROTOCOL_API_H__ -#include "nrf_peripherals.h" +#include "nrfx.h" #if (defined DPPIC_PRESENT || defined DOXYGEN) /** From 8fbe081d013737c4fe3578812057dabfa9c9a3a5 Mon Sep 17 00:00:00 2001 From: Marcin Szymczyk Date: Wed, 15 Oct 2025 15:04:08 +0200 Subject: [PATCH 03/11] crypto: align to nrfx 4.0 MDK should not be included directly, but via nrfx.h Signed-off-by: Marcin Szymczyk --- crypto/nrf_cc310_platform/include/nrf_cc3xx_platform_kmu.h | 2 +- crypto/nrf_cc312_platform/include/nrf_cc3xx_platform_kmu.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/crypto/nrf_cc310_platform/include/nrf_cc3xx_platform_kmu.h b/crypto/nrf_cc310_platform/include/nrf_cc3xx_platform_kmu.h index 79ce770dd3..6471c9b544 100644 --- a/crypto/nrf_cc310_platform/include/nrf_cc3xx_platform_kmu.h +++ b/crypto/nrf_cc310_platform/include/nrf_cc3xx_platform_kmu.h @@ -15,7 +15,7 @@ #include #include -#include "nrf.h" +#include "nrfx.h" #if defined(NRF91_SERIES) || defined(NRF5340_XXAA_APPLICATION) diff --git a/crypto/nrf_cc312_platform/include/nrf_cc3xx_platform_kmu.h b/crypto/nrf_cc312_platform/include/nrf_cc3xx_platform_kmu.h index 79ce770dd3..6471c9b544 100644 --- a/crypto/nrf_cc312_platform/include/nrf_cc3xx_platform_kmu.h +++ b/crypto/nrf_cc312_platform/include/nrf_cc3xx_platform_kmu.h @@ -15,7 +15,7 @@ #include #include -#include "nrf.h" +#include "nrfx.h" #if defined(NRF91_SERIES) || defined(NRF5340_XXAA_APPLICATION) From fc4f942ddb84b05828fe7ac643a11dae30ed1154 Mon Sep 17 00:00:00 2001 From: Marcin Szymczyk Date: Wed, 15 Oct 2025 15:04:31 +0200 Subject: [PATCH 04/11] gzll: align to nrfx 4.0 MDK should not be included directly, but via nrfx.h Signed-off-by: Marcin Szymczyk --- gzll/include/nrf_gzll.h | 3 +-- gzll/include/nrf_gzll_glue.h | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/gzll/include/nrf_gzll.h b/gzll/include/nrf_gzll.h index e79aecc5e6..a5c8a9e4e1 100644 --- a/gzll/include/nrf_gzll.h +++ b/gzll/include/nrf_gzll.h @@ -12,8 +12,7 @@ #ifndef NRF_GZLL_H__ #define NRF_GZLL_H__ -#include -#include "nrf.h" +#include "nrfx.h" #include "nrf_gzll_constants.h" #ifdef __cplusplus diff --git a/gzll/include/nrf_gzll_glue.h b/gzll/include/nrf_gzll_glue.h index c39ab9862a..ee489474c8 100644 --- a/gzll/include/nrf_gzll_glue.h +++ b/gzll/include/nrf_gzll_glue.h @@ -14,8 +14,7 @@ * File defines a set of functions and variables called by Gazell Link Layer. */ -#include -#include +#include #ifdef __cplusplus extern "C" { From d867718828865e3a97fae03e90a25be6118c8820 Mon Sep 17 00:00:00 2001 From: Marcin Szymczyk Date: Wed, 15 Oct 2025 15:04:57 +0200 Subject: [PATCH 05/11] nrf_802154: align to nrfx 4.0 MDK should not be included directly, but via nrfx.h Signed-off-by: Marcin Szymczyk --- nrf_802154/driver/src/nrf_802154_swi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/nrf_802154/driver/src/nrf_802154_swi.c b/nrf_802154/driver/src/nrf_802154_swi.c index b2408d98f0..19aee83ee1 100644 --- a/nrf_802154/driver/src/nrf_802154_swi.c +++ b/nrf_802154/driver/src/nrf_802154_swi.c @@ -43,6 +43,7 @@ #include +#include "nrfx.h" #include "nrf_802154_config.h" #if !NRF_802154_INTERNAL_SWI_IRQ_HANDLING #include "nrf_802154_irq_handlers.h" From 90d2d55859b9b22f0a2e29ecfa1c6ad8efd9f97b Mon Sep 17 00:00:00 2001 From: Marcin Szymczyk Date: Wed, 15 Oct 2025 15:05:22 +0200 Subject: [PATCH 06/11] nrf_dm: align to nrfx 4.0 MDK should not be included directly, but via nrfx.h Signed-off-by: Marcin Szymczyk --- nrf_dm/include/nrf_dm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/nrf_dm/include/nrf_dm.h b/nrf_dm/include/nrf_dm.h index b1a80db96e..54d579fbac 100644 --- a/nrf_dm/include/nrf_dm.h +++ b/nrf_dm/include/nrf_dm.h @@ -17,7 +17,7 @@ #define __NRF_DM_H_ #include -#include "nrf.h" +#include "nrfx.h" #include "nrf_dm_version.h" #ifdef __cplusplus From 8a865ff7113bacba8140c4d4d982ed8a1a492e9a Mon Sep 17 00:00:00 2001 From: Marcin Szymczyk Date: Wed, 15 Oct 2025 15:05:44 +0200 Subject: [PATCH 07/11] softperipheral: align to nrfx 4.0 MDK should not be included directly, but via nrfx.h Signed-off-by: Marcin Szymczyk --- softperipheral/sQSPI/include/nrf_sp_qspi.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/softperipheral/sQSPI/include/nrf_sp_qspi.h b/softperipheral/sQSPI/include/nrf_sp_qspi.h index b52e120ee7..7bf892d3ea 100644 --- a/softperipheral/sQSPI/include/nrf_sp_qspi.h +++ b/softperipheral/sQSPI/include/nrf_sp_qspi.h @@ -7,12 +7,11 @@ #ifndef NRF_SP_QSPI_H__ #define NRF_SP_QSPI_H__ -#include "nrf.h" // Resolve nrfXX_types.h for the correct target to get definitions for __IO, __IOM etc. +#include "nrfx.h" // Resolve nrfXX_types.h for the correct target to get definitions for __IO, __IOM etc. #if defined (NRF_FLPR) extern char __soft_periph_com_start__[]; #define NRF_SP_QSPI_BASE ((uint32_t)&__soft_periph_com_start__) #elif defined (NRF_APPLICATION) -#include "nrfx_config.h" #define NRF_SP_QSPI_BASE (NRF_SQSPI_SP_FIRMWARE_ADDR + 0x3b40) #else #pragma warning "Processor not defined." From be01253e2f8250b3fb225b48c89c5067d5b94310 Mon Sep 17 00:00:00 2001 From: Marcin Szymczyk Date: Thu, 16 Oct 2025 12:51:35 +0200 Subject: [PATCH 08/11] mpsl: split mpsl_hwres Since `mpsh_hwres.h` should not use defines from nrfx, the header has to be split. Signed-off-by: Marcin Szymczyk --- mpsl/include/mpsl.h | 1 + mpsl/include/mpsl_dppi.h | 68 ++++++++++++++++++++++++++++++++ mpsl/include/mpsl_hwres.h | 15 +------ mpsl/include/mpsl_hwres_zephyr.h | 45 +++++++++++++++++++++ 4 files changed, 115 insertions(+), 14 deletions(-) create mode 100644 mpsl/include/mpsl_dppi.h create mode 100644 mpsl/include/mpsl_hwres_zephyr.h diff --git a/mpsl/include/mpsl.h b/mpsl/include/mpsl.h index 8bec48bb34..73d94b41ae 100644 --- a/mpsl/include/mpsl.h +++ b/mpsl/include/mpsl.h @@ -27,6 +27,7 @@ extern "C" { #include "mpsl_clock.h" #include "mpsl_hwres.h" #include "mpsl_hwres_ppi.h" +#include "mpsl_dppi.h" /** @brief High IRQ priority * diff --git a/mpsl/include/mpsl_dppi.h b/mpsl/include/mpsl_dppi.h new file mode 100644 index 0000000000..cf97bbc006 --- /dev/null +++ b/mpsl/include/mpsl_dppi.h @@ -0,0 +1,68 @@ +/* + * Copyright (c) Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +/** + * @file mpsl_dppi.h + * + * @defgroup mpsl_dppi MPSL DPPI API + * @ingroup mpsl + * + * This file defines an API to dynamically allocate some of hardware + * resources. The allocation functions are expected to be implemented + * outside of the MPSL. + * @{ + */ + +#ifndef MPSL_DPPI_H__ +#define MPSL_DPPI_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(DPPI_PRESENT) || defined(DOXYGEN) + +/** @brief Allocate a DPPI channel of a DPPIC controller instance. + * + * @param[in] p_dppic Pointer to a DPPIC controller instance. + * @param[out] p_dppi_ch Allocated DPPI channel number on the given DPPIC instance. + * Value written at this pointer is valid only on successful + * allocation. + * + * @retval true Allocation successful. + * @retval false Allocation failed. + */ +bool mpsl_hwres_dppi_channel_alloc(NRF_DPPIC_Type * p_dppic, uint8_t * p_dppi_ch); + +#endif /* DPPI_PRESENT */ + +#if defined(PPIB_PRESENT) || defined(DOXYGEN) + +/** @brief Allocate a PPIB channel of a PPIB-to-PPIB interconnection. + * + * @param[in] p_ppib Pointer to a PPIB instance. + * @param[out] p_ppib_ch Allocated PPIB channel number the for PPIB-to-PPIB + * interconnection identified by the @p p_ppib being one + * of the sides of the interconnection. + * Value written at this pointer valid only on successful + * allocation. + * + * @retval true Allocation successful. + * @retval false Allocation failed. + */ +bool mpsl_hwres_ppib_channel_alloc(NRF_PPIB_Type * p_ppib, uint8_t * p_ppib_ch); + +#endif /* PPIB_PRESENT */ + +#ifdef __cplusplus +} +#endif + +#endif // MPSL_DPPI_H__ + +/**@} */ diff --git a/mpsl/include/mpsl_hwres.h b/mpsl/include/mpsl_hwres.h index c461414f80..0dd67f7d29 100644 --- a/mpsl/include/mpsl_hwres.h +++ b/mpsl/include/mpsl_hwres.h @@ -25,20 +25,8 @@ extern "C" { #endif -/* Reserved (D)PPI, PPIB and IPCT resources for the supported platforms. */ -/* This corresponds to the PPI channels 19, 30, and 31. */ -#define MPSL_NRF52_PPI_CHANNELS_USED_MASK (0xc0080000) -/* This corresponds to the DPPI channels 0, 1, and 2. */ -#define MPSL_NRF53_DPPIC_CHANNELS_USED_MASK (0x00000007) -#define MPSL_NRF54L_DPPIC10_CHANNELS_USED_MASK (0x00000001) -#define MPSL_NRF54L_DPPIC20_CHANNELS_USED_MASK (0x00000001) -#define MPSL_NRF54L_PPIB11_CHANNELS_USED_MASK (0x00000001) -#define MPSL_NRF54L_PPIB21_CHANNELS_USED_MASK (0x00000001) -#define MPSL_NRF54H_DPPIC020_CHANNELS_USED_MASK (0x00000001) -#define MPSL_NRF54H_IPCT130_CHANNELS_USED_MASK (0x00000001) - -#if !defined(__ZEPHYR__) #include "nrfx.h" +#include "mpsl_hwres_zephyr.h" #if defined(NRF52_SERIES) #define MPSL_RESERVED_PPI_CHANNELS ((1UL << 19) | (1UL << 30) | (1UL << 31)) @@ -70,7 +58,6 @@ extern "C" { #else #define MPSL_TIMER0 NRF_TIMER020 #endif -#endif #ifdef __cplusplus } diff --git a/mpsl/include/mpsl_hwres_zephyr.h b/mpsl/include/mpsl_hwres_zephyr.h new file mode 100644 index 0000000000..ae609855b4 --- /dev/null +++ b/mpsl/include/mpsl_hwres_zephyr.h @@ -0,0 +1,45 @@ +/* + * Copyright (c) Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +/** + * @file mpsl_hwres_zephyr.h + * + * @defgroup mpsl_hwres MPSL hardware resources API for Zephyr + * @ingroup mpsl + * + * This file defines fixed hardware resources used by the MPSL in Zephyr. + * @{ + */ + +#ifndef MPSL_HWRES_ZEPHYR_H__ +#define MPSL_HWRES_ZEPHYR_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* Reserved (D)PPI, PPIB and IPCT resources for the supported platforms. */ +/* This corresponds to the PPI channels 19, 30, and 31. */ +#define MPSL_NRF52_PPI_CHANNELS_USED_MASK (0xc0080000) +/* This corresponds to the DPPI channels 0, 1, and 2. */ +#define MPSL_NRF53_DPPIC_CHANNELS_USED_MASK (0x00000007) +#define MPSL_NRF54L_DPPIC10_CHANNELS_USED_MASK (0x00000001) +#define MPSL_NRF54L_DPPIC20_CHANNELS_USED_MASK (0x00000001) +#define MPSL_NRF54L_PPIB11_CHANNELS_USED_MASK (0x00000001) +#define MPSL_NRF54L_PPIB21_CHANNELS_USED_MASK (0x00000001) +#define MPSL_NRF54H_DPPIC020_CHANNELS_USED_MASK (0x00000001) +#define MPSL_NRF54H_IPCT130_CHANNELS_USED_MASK (0x00000001) + +#ifdef __cplusplus +} +#endif + +#endif // MPSL_HWRES_ZEPHYR_H__ + +/**@} */ From 51b66e52a0e34576ee95c33aaf66366767e359c1 Mon Sep 17 00:00:00 2001 From: Marcin Szymczyk Date: Wed, 29 Oct 2025 19:46:48 +0100 Subject: [PATCH 09/11] nrf_802154: align to moved nrfx_coredep It is located in lib now. Signed-off-by: Marcin Szymczyk --- nrf_802154/driver/src/nrf_802154_utils.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/nrf_802154/driver/src/nrf_802154_utils.h b/nrf_802154/driver/src/nrf_802154_utils.h index df93008df5..783522872b 100644 --- a/nrf_802154/driver/src/nrf_802154_utils.h +++ b/nrf_802154/driver/src/nrf_802154_utils.h @@ -38,7 +38,7 @@ #include "nrf_802154_assert.h" #include #include "nrfx.h" -#include +#include #ifdef __STATIC_INLINE__ #undef __STATIC_INLINE__ From df2ebe96ce65b167c581fc5cfe3fb8eaa493c447 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Krzysztof=20Chru=C5=9Bci=C5=84ski?= Date: Thu, 30 Oct 2025 09:44:52 +0100 Subject: [PATCH 10/11] nrf_802154: Align to the new GPPI in nrfx 4.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit GPPI handles all PPI system and nrfx_ppi, nrfx_dppi, nrfx_ppib are now deprecated. Signed-off-by: Krzysztof Chruściński --- nrf_802154/zephyr/Kconfig.nrfxlib | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/nrf_802154/zephyr/Kconfig.nrfxlib b/nrf_802154/zephyr/Kconfig.nrfxlib index 37664c1a2c..a3af88f728 100644 --- a/nrf_802154/zephyr/Kconfig.nrfxlib +++ b/nrf_802154/zephyr/Kconfig.nrfxlib @@ -76,12 +76,7 @@ config NRF_802154_SL select DYNAMIC_INTERRUPTS select SENSOR if NRF_802154_TEMPERATURE_UPDATE select TEMP_NRF5_MPSL if NRF_802154_TEMPERATURE_UPDATE - select NRFX_GPPI if SOC_COMPATIBLE_NRF52X || SOC_COMPATIBLE_NRF53X - select NRFX_PPI if SOC_COMPATIBLE_NRF52X - select NRFX_DPPI0 if SOC_COMPATIBLE_NRF53X || SOC_SERIES_NRF53X - select NRFX_DPPI20 if SOC_SERIES_NRF54LX - select NRFX_PPIB11 if SOC_SERIES_NRF54LX - select NRFX_PPIB21 if SOC_SERIES_NRF54LX + select NRFX_GPPI depends on !NRF_802154_SOURCE_HAL_NORDIC help Use of Nordic Semiconductor proprietary implementation of nRF 802.15.4 Service Layer. From f18a57a819a1d60bfb877094fdbeab9530f08335 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20Stasiak?= Date: Thu, 30 Oct 2025 15:45:43 +0100 Subject: [PATCH 11/11] nfc: nfc_platform: replace nrfx_err_t with int MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit NRFX drivers now return errno codes. Signed-off-by: Michał Stasiak --- nfc/include/nfc_platform.h | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/nfc/include/nfc_platform.h b/nfc/include/nfc_platform.h index fbfd7e632c..23d5c2acf7 100644 --- a/nfc/include/nfc_platform.h +++ b/nfc/include/nfc_platform.h @@ -61,10 +61,10 @@ typedef void (* nfc_lib_cb_resolve_t)(const void * p_ctx, const uint8_t * p_data * @param[in, out] p_irq_priority Pointer to the interrupt priority configuration. You must * set its value inside this function. * - * @retval NRFX_SUCCESS If the NFC module is initialized successfully. If one - * of the arguments is invalid, an error code is returned. + * @retval 0 If the NFC module is initialized successfully. If one + * of the arguments is invalid, an error code is returned. */ -nrfx_err_t nfc_platform_setup(nfc_lib_cb_resolve_t nfc_lib_cb_resolve, uint8_t * p_irq_priority); +int nfc_platform_setup(nfc_lib_cb_resolve_t nfc_lib_cb_resolve, uint8_t * p_irq_priority); /** @@ -75,13 +75,11 @@ nrfx_err_t nfc_platform_setup(nfc_lib_cb_resolve_t nfc_lib_cb_resolve, uint8_t * * can be used to fill the Type 2 Tag Internal Bytes. * @param[in] nfcid1_buff_len Length of the NFCID1 buffer. * - * @retval NRFX_SUCCESS The operation was successful. - * @retval NRFX_ERROR_INVALID_LENGTH Length of the NFCID buffer is different than - * NRFX_NFCT_NFCID1_SINGLE_SIZE, - * NRFX_NFCT_NFCID1_DOUBLE_SIZE, or - * NRFX_NFCT_NFCID1_TRIPLE_SIZE. + * @retval 0 The operation was successful. + * @retval -E2BIG Length of the NFCID buffer is different than NRFX_NFCT_NFCID1_SINGLE_SIZE, + * NRFX_NFCT_NFCID1_DOUBLE_SIZE, or NRFX_NFCT_NFCID1_TRIPLE_SIZE. */ -nrfx_err_t nfc_platform_nfcid1_default_bytes_get(uint8_t * const p_nfcid1_buff, +int nfc_platform_nfcid1_default_bytes_get(uint8_t * const p_nfcid1_buff, uint32_t nfcid1_buff_len);