[nrf fromtree] flash: nrf_mram: limit Ready register check only to nrf54h series

rghaddab · rlubos · commit 0f0a6220e842 · 2026-05-26T17:33:03.000+02:00
Ready registers are defined for the nrf54h series but not necesssary for other soc families. Limit the Ready register check only to this family of socs. Signed-off-by: Riadh Ghaddab <riadh.ghaddab@nordicsemi.no> (cherry picked from commit 8736e21)
diff --git a/drivers/flash/soc_flash_nrf_mram.c b/drivers/flash/soc_flash_nrf_mram.c
@@ -177,7 +177,7 @@ static int nrf_mram_erase_and_verify_word(uint32_t addr, size_t len)
 	return -EIO;
 }
 
-#ifdef CONFIG_MRAM_LATENCY
+#if defined(CONFIG_MRAM_LATENCY) && defined(CONFIG_SOC_SERIES_NRF54H)
 static inline bool nrf_mram_ready(uint32_t addr, uint32_t ironside_se_ver)
 {
 	if (ironside_se_ver < IRONSIDE_SE_SUPPORT_READY_VER) {

Original file line number	Diff line number	Diff line change
`@@ -177,7 +177,7 @@ static int nrf_mram_erase_and_verify_word(uint32_t addr, size_t len)`
`177`	`177`	`return -EIO;`
`178`	`178`	`}`
`179`	`179`
`180`		`-#ifdef CONFIG_MRAM_LATENCY`
	`180`	`+#if defined(CONFIG_MRAM_LATENCY) && defined(CONFIG_SOC_SERIES_NRF54H)`
`181`	`181`	`static inline bool nrf_mram_ready(uint32_t addr, uint32_t ironside_se_ver)`
`182`	`182`	`{`
`183`	`183`	`if (ironside_se_ver < IRONSIDE_SE_SUPPORT_READY_VER) {`